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Method for selective gate halo implantation in a semiconductor die and related structure |
Xiangdong Chen, Henry Chen, Kent Oertle |
2012-01-03 |
| 8013422 |
Fuse corner pad for an integrated circuit |
Art Pharn, James Seymour |
2011-09-06 |
| 7687880 |
Fuse corner pad for an integrated circuit |
Art Pharn, James Seymour |
2010-03-30 |
| 7366940 |
Multiprotocol computer bus interface adapter and method |
Gary Alvstad, Myles Wakayama |
2008-04-29 |
| 7208776 |
Fuse corner pad for an integrated circuit |
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2007-04-24 |
| 6829715 |
Multiprotocol computer bus interface adapter and method |
Gary Alvstad, Myles Wakayama |
2004-12-07 |
| 6321319 |
Computer system for allowing a two word jump instruction to be executed in the same number of cycles as a single word jump instruction |
Rodney Drake, Randy Yach, Joseph W. Triece, Igor Wojewoda, Steve Allen |
2001-11-20 |
| 6243798 |
Computer system for allowing a two word jump instruction to be executed in the same number of cycles as a single word jump instruction |
Rodney Drake, Randy Yach, Joseph W. Triece, Igor Wojewoda, Steve Allen |
2001-06-05 |
| 5889829 |
Phase locked loop with improved lock time and stability |
Randy Yach |
1999-03-30 |
| 5874863 |
Phase locked loop with fast start-up circuitry |
Igor Wojewoda |
1999-02-23 |
| 5293081 |
Driver circuit for output buffers |
Stephen T. Flannagan, Taisheng Feng |
1994-03-08 |
| 5291455 |
Memory having distributed reference and bias voltages |
Taisheng Feng, John D. Porter |
1994-03-01 |
| 5184033 |
Regulated BiCMOS output buffer |
Stephen T. Flannagan, Taisheng Feng |
1993-02-02 |
| 5043943 |
Cache memory with a parity write control circuit |
Richard Dewitt Crisp, Taisheng Feng |
1991-08-27 |