Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5666509 | Data processing system for performing either a precise memory access or an imprecise memory access based upon a logical address value and method thereof | Daniel M. McCarthy, Joseph C. Circello, Gregory C. Edgington, Cliff L. Parrott, William B. Ledbetter, Jr. | 1997-09-09 |
| 5592493 | Serial scan chain architecture for a data processing system and method of operation | Alfred L. Crouch, Matthew D. Pressly, Joseph C. Circello | 1997-01-07 |
| 5530804 | Superscalar processor with plural pipelined execution units each unit selectively having both normal and debug modes | Gregory C. Edgington, Joseph C. Circello, Daniel M. McCarthy | 1996-06-25 |
| 5131086 | Method and system for executing pipelined three operand construct | Joseph C. Circello, Roger W. Luce, Ralph H. Olson | 1992-07-14 |
| 5101341 | Pipelined system for reducing instruction access time by accumulating predecoded instruction bits a FIFO | Joseph C. Circello, Roger W. Luce, Ralph H. Olson | 1992-03-31 |