Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5891769 | Method for forming a semiconductor device having a heteroepitaxial layer | Curtis Lee Burt, Stella Q. Hong, Clifford P. Stein | 1999-04-06 |
| 5520785 | Method for enhancing aluminum nitride | Keenan L. Evans, Jong-Kai Lin | 1996-05-28 |
| 5430327 | Ohmic contact for III-V semiconductor materials | Schyi-yi Wu, Curtis D. Moyer, Steven A. Voight, Israel A. Lesk | 1995-07-04 |
| 5275971 | Method of forming an ohmic contact to III-V semiconductor materials | Schyi-yi Wu, Curtis D. Moyer, Steven A. Voight, Israel A. Lesk | 1994-01-04 |
| 5272096 | Method for making a bipolar transistor having a silicon carbide layer | Edouard D. de Frésart | 1993-12-21 |
| 5141887 | Low voltage, deep junction device and method | Frank S. d'Aragona, Raymond M. Roop, Dennis R. Olsen | 1992-08-25 |
| 5108946 | Method of forming planar isolation regions | Peter J. Zdebel, Barbara Vasquez, Christian A. Seelbach | 1992-04-28 |
| 5080933 | Selective deposition of polycrystalline silicon | Melissa Grupen-Shemansky | 1992-01-14 |
| 4963506 | Selective deposition of amorphous and polycrystalline silicon | Christian A. Seelbach | 1990-10-16 |
| 4849371 | Monocrystalline semiconductor buried layers for electrical contacts to semiconductor devices | Kent W. Hansen, Frank S. d'Aragona | 1989-07-18 |
| 4818323 | Method of making a void free wafer via vacuum lamination | Frank S. d'Aragona | 1989-04-04 |
| 4786615 | Method for improved surface planarity in selective epitaxial silicon | Ha Thi Hoang NGUYEN | 1988-11-22 |
| 4663831 | Method of forming transistors with poly-sidewall contacts utilizing deposition of polycrystalline and insulating layers combined with selective etching and oxidation of said layers | Mark S. Birrittella, Robert H. Reuss | 1987-05-12 |