Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6961916 | Placement method for integrated circuit design using topo-clustering | Majid Sarrafzadeh, Lawrence Pileggi, Sharad Malik, Feroze P. Taraporevala, Abhijeet Chakraborty +4 more | 2005-11-01 |
| 6442743 | Placement method for integrated circuit design using topo-clustering | Majid Sarrafzadeh, Lawrence Pileggi, Sharad Malik, Feroze P. Taraporevala, Abhijeet Chakraborty +4 more | 2002-08-27 |
| 6286128 | Method for design optimization using logical and physical information | Lawrence Pileggi, Majid Sarrafzadeh, Sharad Malik, Abhijeet Chakraborty, Archie Li +17 more | 2001-09-04 |