Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6449756 | Method for accurate and efficient updates of timing information logic synthesis, placement and routing for integrated circuit design | Sharad Malik, Lawrence Pileggi, Abhijeet Chakraborty, Douglas B. Boyle | 2002-09-10 |
| 6286128 | Method for design optimization using logical and physical information | Lawrence Pileggi, Majid Sarrafzadeh, Sharad Malik, Abhijeet Chakraborty, Archie Li +17 more | 2001-09-04 |