FH

Fu-Chieh Hsu

MT Monolithic System Technology: 46 patents #2 of 10Top 20%
IT Integrated Device Technology: 5 patents #128 of 758Top 20%
TSMC: 4 patents #4,745 of 12,232Top 40%
MO Mosys: 3 patents #13 of 45Top 30%
KT Knights Technology: 2 patents #1 of 11Top 10%
WI Wistron: 2 patents #559 of 2,107Top 30%
MS Monolithic Systems: 1 patents #3 of 4Top 75%
MT Myson Technology: 1 patents #8 of 19Top 45%
HP HP: 1 patents #3,612 of 7,018Top 55%
📍 Cupertino, CA: #174 of 6,989 inventorsTop 3%
🗺 California: #4,767 of 386,348 inventorsTop 2%
Overall (All Time): #31,982 of 4,157,543Top 1%
67
Patents All Time

Issued Patents All Time

Showing 51–67 of 67 patents

Patent #TitleCo-InventorsDate
5666480 Fault-tolerant hierarchical bus system and method of operating same Wingyu Leung 1997-09-09
5655113 Resynchronization circuit for a memory system and method of operating same Wingyu Leung, Winston Lee 1997-08-05
5613077 Method and circuit for communication between a module and a bus controller in a wafer-scale integrated circuit system Wing Yu Leung 1997-03-18
5592632 Defect tolerant integrated circuit subsystem for communication between a module and a bus controller in a wafer-scale integrated circuit system Wing Yu Leung 1997-01-07
5576554 Wafer-scale integrated circuit interconnect structure architecture 1996-11-19
5511020 Pseudo-nonvolatile memory incorporating data refresh operation Chenming Hu 1996-04-23
5498886 Circuit module redundancy architecture Wingyu Leung 1996-03-12
5498990 Reduced CMOS-swing clamping circuit for bus lines Wingyu Leung, Winston Lee 1996-03-12
5265047 High density SRAM circuit with single-ended memory cells Wingyu Leung 1993-11-23
5166556 Programmable antifuse structure, process, logic cell and architecture for programmable integrated circuits Pei-Lin Pai 1992-11-24
5128731 Static random access memory cell using a P/N-MOS transistors Chuen-Der Lien, Jeong Yeol Choi, Jeng-Jiun Yang 1992-07-07
5019771 Contact sensing for integrated circuit testing Tsen-Shau Yang, Ger-Chih Chou 1991-05-28
4997783 Static ram cell with trench pull-down transistors and buried-layer ground plate 1991-03-05
4987090 Static ram cell with trench pull-down transistors and buried-layer ground plate Chun Chiu Daniel Wong, Ciaran Hanrahan 1991-01-22
4876215 Method of making a static ram cell with trench pull-down transistors and buried-layer ground plate 1989-10-24
4843023 Process for forming lightly-doped-drain (LDD) without extra masking steps Kuang-Yi Chiu 1989-06-27
4794561 Static ram cell with trench pull-down transistors and buried-layer ground plate 1988-12-27