Issued Patents All Time
Showing 251–275 of 294 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5886946 | Semiconductor memory device allowing reduction in power consumption during standby | — | 1999-03-23 |
| 5881014 | Semiconductor memory device with a voltage down converter stably generating an internal down-converter voltage | — | 1999-03-09 |
| RE36089 | Column selecting circuit in semiconductor memory device | Kazutami Arimoto, Hideto Hidaka, Masanori Hayashikoshi, Shinji Kawai, Mikio Asakura +4 more | 1999-02-09 |
| 5862096 | Semiconductor memory device having optimally arranged internal down-converting circuitry | Kenichi Yasuda, Jun Setogawa | 1999-01-19 |
| 5847597 | Potential detecting circuit for determining whether a detected potential has reached a prescribed level, and a semiconductor integrated circuit including the same | Yuichiro Komiya | 1998-12-08 |
| 5847595 | Semiconductor device having controllable internal potential generating circuit | Takashi Kono, Hideto Hidaka | 1998-12-08 |
| 5844767 | Level converting circuit for converting level of an input signal, internal potential generating circuit for generating internal potential, internal potential generating unit generating internal potential highly reliable semiconductor device and method of | Yuichiro Komiya, Hideto Hidaka, Mikio Asakura | 1998-12-01 |
| 5844262 | Semiconductor device for reducing effects of noise on an internal circuit | — | 1998-12-01 |
| 5841729 | Semiconductor memory device in which data are read and written asynchronously with application of address signal | — | 1998-11-24 |
| 5835436 | Dynamic type semiconductor memory device capable of transferring data between array blocks at high speed | — | 1998-11-10 |
| 5835966 | Semiconductor memory device and memory access system using a four-state address signal | — | 1998-11-10 |
| 5828258 | Semiconductor device and testing apparatus thereof | Tomoya Kawagoe, Hideto Hidaka, Mikio Asakura | 1998-10-27 |
| 5801576 | Semiconductor integrated circuit device having a hierarchical power source configuration | — | 1998-09-01 |
| 5793686 | Semiconductor memory device having data input/output circuit of small occupied area capable of high-speed data input/output | Kiyohiro Furutani, Mikio Asakura, Hideto Hidaka, Kei Hamade, Yoshito Nakaoka | 1998-08-11 |
| 5783956 | Semiconductor device realizing internal operation factor corresponding to an external operational factor stably regardless of fluctuation of the external operational factor | — | 1998-07-21 |
| 5760614 | Potential detecting circuit and semiconductor integrated circuit | Hideto Hidaka, Mikio Asakura | 1998-06-02 |
| 5757175 | Constant current generating circuit | Fukashi Morishita, Masaki Tsukude, Kyoji Yamasaki | 1998-05-26 |
| 5751651 | Semiconductor integrated circuit device having a hierarchical power source configuration | — | 1998-05-12 |
| 5751627 | Memory cell that can store data nonvolatily using a ferroelectric capacitor, and a semiconductor memory device including such a memory cell | — | 1998-05-12 |
| 5723885 | Semiconductor device including a ferroelectric film and control method thereof | — | 1998-03-03 |
| 5717652 | Semiconductor memory device capable of high speed plural parallel test, method of data writing therefor and parallel tester | — | 1998-02-10 |
| 5710737 | Semiconductor memory device | Yuichiro Komiya, Kiyohiro Furutani, Kei Hamade | 1998-01-20 |
| 5706233 | Semiconductor memory device allowing acceleration testing, and a semi-finished product for an integrated semiconductor device that allows acceleration testing | — | 1998-01-06 |
| 5691954 | Semiconductor memory device in which data are read and written asynchronously with application of address signal | — | 1997-11-25 |
| 5689460 | Semiconductor memory device with a voltage down converter stably generating an internal down-converted voltage | — | 1997-11-18 |