Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5914907 | Semiconductor memory device capable of increasing chip yields while maintaining rapid operation | Mako Kobayashi, Tetsushi Tanizaki, Kazutami Arimoto, Teruhiko Amano, Takeshi Fujino +2 more | 1999-06-22 |
| 5872737 | Semiconductor integrated circuit device in which influence of power supply noise on internal circuitry during operation of input/output buffer is prevented | Kazutami Arimoto | 1999-02-16 |
| 5848012 | Semiconductor memory device having hierarchical bit line structure employing improved bit line precharging system | Masaki Tsukude | 1998-12-08 |
| 5825696 | Semiconductor memory device including an SOI substrate | Hideto Hidaka, Katsuhiro Suma | 1998-10-20 |
| 5815428 | Semiconductor memory device having hierarchical bit line structure | Masaki Tsukude | 1998-09-29 |
| 5796664 | Semiconductor memory device having divided word line | Kazutami Arimoto | 1998-08-18 |
| 5773865 | Semiconductor memory and semiconductor device having SOI structure | Hideto Hidaka | 1998-06-30 |
| 5734614 | Dynamic semiconductor memory device using sense amplifier as cache memory | Kazutami Arimoto | 1998-03-31 |
| 5652726 | Semiconductor memory device having hierarchical bit line structure employing improved bit line precharging system | Masaki Tsukude | 1997-07-29 |
| 5635744 | Semiconductor memory and semiconductor device having SOI structure | Hideto Hidaka, Katsuhiro Suma | 1997-06-03 |
| 5604707 | Semiconductor memory device responsive to hierarchical internal potentials | Shigehiro Kuge, Shigeki Tomishima, Kazutami Arimoto, Hideto Hidaka | 1997-02-18 |
| 5574397 | Signal output circuit operating stably and arrangement of power supply interconnection line therefor in semiconductor integrated circuit device | Shigeki Tomishima, Hideto Hidaka, Masakazu Hirose | 1996-11-12 |
| 5512501 | Method of manufacturing a semiconductor device having an SOI structure | Hideto Hidaka, Katsuhiro Suma | 1996-04-30 |
| 5390140 | Signal output circuit operating stably and arrangement of power supply interconnection line therefor in semiconductor integrated circuit device | Shigeki Tomishima, Hideto Hidaka, Masakazu Hirose | 1995-02-14 |