Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7242060 | Semiconductor memory device including an SOI substrate | Hideto Hidaka, Takahiro Tsuruda | 2007-07-10 |
| 7138684 | Semiconductor memory device including an SOI substrate | Hideto Hidaka, Takahiro Tsuruda | 2006-11-21 |
| 6787853 | Semiconductor device using an SOI substrate | Hideto Hidaka, Takahiro Tsuruda | 2004-09-07 |
| 6768662 | Semiconductor memory device including an SOI substrate | Hideto Hidaka, Takahiro Tsuruda | 2004-07-27 |
| 6586803 | Semiconductor device using an SOI substrate | Hideto Hidaka, Takahiro Tsuruda | 2003-07-01 |
| 6577522 | Semiconductor memory device including an SOI substrate | Hideto Hidaka, Takahiro Tsuruda | 2003-06-10 |
| 6384445 | Semiconductor memory device including memory cell transistors formed on SOI substrate and having fixed body regions | Hideto Hidaka, Takahiro Tsuruda | 2002-05-07 |
| 6385159 | Semiconductor memory device including an SOI substrate | Hideto Hidaka, Takahiro Tsuruda | 2002-05-07 |
| 6288949 | Semiconductor memory device including an SOI substrate | Hideto Hidaka, Takahiro Tsuruda | 2001-09-11 |
| 6215141 | Semiconductor device including a transistor having portions of source and drain regions removed by the same amount | Hideto Hidaka, Takahiro Tsuruda | 2001-04-10 |
| 6091647 | Semiconductor memory device including an SOI substrate | Hideto Hidaka, Takahiro Tsuruda | 2000-07-18 |
| 6060738 | Semiconductor device having SOI structure | Hideto Hidaka, Takahiro Tsuruda | 2000-05-09 |
| 6018172 | Semiconductor memory device including memory cell transistors formed on SOI substrate and having fixed body regions | Hideto Hidaka, Takahiro Tsuruda | 2000-01-25 |
| 5982005 | Semiconductor device using an SOI substrate | Hideto Hidaka, Takahiro Tsuruda | 1999-11-09 |
| RE36089 | Column selecting circuit in semiconductor memory device | Tsukasa Ooishi, Kazutami Arimoto, Hideto Hidaka, Masanori Hayashikoshi, Shinji Kawai +4 more | 1999-02-09 |
| 5825696 | Semiconductor memory device including an SOI substrate | Hideto Hidaka, Takahiro Tsuruda | 1998-10-20 |
| 5793685 | Semiconductor memory device capable of simultaneously designating multibit test mode and special test mode | — | 1998-08-11 |
| 5770964 | Arrangement enabling pin contact test of a semiconductor device having clamp protection circuit, and method of testing a semiconductor device | — | 1998-06-23 |
| 5652725 | Semiconductor memory device having a redundant row and a redundant column which can be accessed prior to substitution | Yasuhiko Tsukikawa, Masaki Tsukude | 1997-07-29 |
| 5635744 | Semiconductor memory and semiconductor device having SOI structure | Hideto Hidaka, Takahiro Tsuruda | 1997-06-03 |
| 5512501 | Method of manufacturing a semiconductor device having an SOI structure | Hideto Hidaka, Takahiro Tsuruda | 1996-04-30 |
| 5400290 | Semiconductor device allowing accurate characteristics test | Masaki Tsukude, Yukinobu Adachi | 1995-03-21 |
| 5315548 | Column selecting circuit in semiconductor memory device | Tsukasa Ooishi, Kazutami Arimoto, Hideto Hidaka, Masanori Hayashikoshi, Shinji Kawai +4 more | 1994-05-24 |