Issued Patents All Time
Showing 51–75 of 76 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6380036 | Semiconductor device and method of manufacturing the same | Shuichi Ueno, Takehisa Yamaguchi | 2002-04-30 |
| 6359321 | MIS transistor and method of fabricating the same | Satoshi Shimizu | 2002-03-19 |
| 6335549 | EEPROM with high channel hot carrier injection efficiency | Shigeru Kusunoki | 2002-01-01 |
| 6335252 | Semiconductor device manufacturing method | Toshiyuki Oishi, Yukio Nishida, Hirokazu Sayama | 2002-01-01 |
| 6300664 | Semiconductor device and method of fabricating the same | Takashi Kuroi, Shuichi Ueno, Satoshi Shimizu | 2001-10-09 |
| 6239471 | MIS transistor and manufacturing method thereof | Satoshi Shimizu | 2001-05-29 |
| 6235564 | Method of manufacturing MISFET | Yasuyoshi Itoh, Yasuo Inoue | 2001-05-22 |
| 6180519 | Method of forming a layered wiring structure including titanium silicide | Takashi Kuroi | 2001-01-30 |
| 6162668 | Method of manufacturing a semiconductor device having a lightly doped contact impurity region surrounding a highly doped contact impurity region | Tomohiro Yamashita | 2000-12-19 |
| 6153910 | Semiconductor device with nitrogen implanted channel region | Shuichi Ueno, Takehisa Yamaguchi | 2000-11-28 |
| 6130463 | Field effect transistor and method of manufacturing same | Tomohiro Yamashita, Shuichi Ueno | 2000-10-10 |
| 6107156 | Silicide layer forming method and semiconductor integrated circuit | Satoshi Shimizu | 2000-08-22 |
| 6040629 | Semiconductor integrated circuit having silicided elements of short length | Satoshi Shimizu | 2000-03-21 |
| 5978294 | Memory cell evaluation semiconductor device, method of fabricating the same and memory cell evaluation method | Shuichi Ueno, Tomohiro Yamashita, Shigeki Komori | 1999-11-02 |
| 5950098 | Manufacturing method of a semiconductor device with a silicide layer | Takashi Kuroi | 1999-09-07 |
| 5945710 | Semiconductor device with doped contact impurity regions having particular doping levels | Tomohiro Yamashita | 1999-08-31 |
| 5837606 | Semiconductor device having internal wire and method of fabricating the same | Takehisa Yamaguchi | 1998-11-17 |
| 5801425 | Semiconductor device having a wiring layer including a TISI2, film of the C49 or C54 structure | Takashi Kuroi | 1998-09-01 |
| 5710438 | Semiconductor device with a silicide layer | Takashi Kuroi | 1998-01-20 |
| 5557129 | Semiconductor MOSFET device having a shallow nitrogen implanted channel region | Shuichi Ueno, Takehisa Yamaguchi | 1996-09-17 |
| 5550409 | Semiconductor device having internal wire and method of fabricating the same | Takehisa Yamaguchi | 1996-08-27 |
| 5270242 | Method for fabricatins dynamic random access memory device having a capacitor for storing impact ionization charges | Kiyoteru Kobayashi, Takehisa Yamaguchi | 1993-12-14 |
| 5218217 | Dynamic random access memory device and method of manufacturing | Kiyoteru Kobayashi, Takehisa Yamaguchi | 1993-06-08 |
| 4987092 | Process for manufacturing stacked semiconductor devices | Kiyoteru Kobayashi, Tadashi Nishimura, Hiroshi Morita, Shuji Nakao, Yasuo Inoue | 1991-01-22 |
| 4984199 | Semiconductor memory cells having common contact hole | Masahiro Yoneda, Masahiro Hatanaka, Yoshio Kohno, Shinichi Satoh, Koichi Moriizumi | 1991-01-08 |