Issued Patents All Time
Showing 126–150 of 301 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9318211 | Apparatuses and methods including memory array data line selection | — | 2016-04-19 |
| 9305656 | Methods applying a non-zero voltage differential across a memory cell not involved in an access operation | — | 2016-04-05 |
| 9299437 | Apparatuses and methods including memory write operation | — | 2016-03-29 |
| 9285997 | Independently selective tile group access with data structuring | — | 2016-03-15 |
| 9263460 | Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate | — | 2016-02-16 |
| 9263461 | Apparatuses including memory arrays with source contacts adjacent edges of sources | — | 2016-02-16 |
| 9257180 | Random telegraph signal noise reduction scheme for semiconductor memories | — | 2016-02-09 |
| 9224477 | Apparatuses and methods for coupling load current to a common source | — | 2015-12-29 |
| 9208891 | Memory array with power-efficient read architecture | — | 2015-12-08 |
| 9177614 | Apparatuses and methods including memory with top and bottom data lines | — | 2015-11-03 |
| 9171587 | Vertical memory with body connection | — | 2015-10-27 |
| 9136017 | Short-checking methods | — | 2015-09-15 |
| 9111620 | Memory having memory cell string and coupling components | — | 2015-08-18 |
| 9111591 | Interconnections for 3D memory | — | 2015-08-18 |
| 9082485 | Apparatuses and methods including memory array and data line architecture | — | 2015-07-14 |
| 9064578 | Enable/disable of memory chunks during memory access | Satoru Tamada, Koichi Kawai, Tetsuji Manabe | 2015-06-23 |
| 9064577 | Apparatuses and methods to control body potential in memory operations | Han Zhao, Akira Goda, Krishna K. Parat, Aurelio Giancarlo Mauri, Haitao Liu +2 more | 2015-06-23 |
| 9064576 | Apparatuses and methods for transposing select gates | — | 2015-06-23 |
| 9064551 | Apparatuses and methods for coupling load current to a common source | — | 2015-06-23 |
| 9053043 | Method of error correction of a memory | Tomoharu Tanaka, Noboru Shibata | 2015-06-09 |
| 9042180 | Charge pump redundancy in a memory | Tomoharu Tanaka | 2015-05-26 |
| 9030882 | Apparatuses and methods including memory array data line selection | — | 2015-05-12 |
| 9025385 | Voltage generation and adjustment in a memory device | — | 2015-05-05 |
| 9019766 | Biasing system and method | — | 2015-04-28 |
| 9000836 | Voltage generator circuit | — | 2015-04-07 |