Issued Patents All Time
Showing 151–175 of 301 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8995188 | Sharing support circuitry in a memory | — | 2015-03-31 |
| 8976594 | Memory read apparatus and methods | — | 2015-03-10 |
| 8971117 | Apparatus and methods for applying a non-zero voltage differential across a memory cell not involved in an access operation | — | 2015-03-03 |
| 8952482 | Three-dimensional devices having reduced contact length | — | 2015-02-10 |
| 8891305 | Apparatuses and methods involving accessing distributed sub-blocks of memory cells | — | 2014-11-18 |
| 8860117 | Semiconductor apparatus with multiple tiers of memory cells with peripheral transistors, and methods | — | 2014-10-14 |
| 8861274 | Compensating for off-current in a memory | — | 2014-10-14 |
| 8853778 | Devices for shielding a signal line over an active region | — | 2014-10-07 |
| 8837222 | Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate | — | 2014-09-16 |
| 8811084 | Memory array with power-efficient read architecture | — | 2014-08-19 |
| 8797804 | Vertical memory with body connection | — | 2014-08-05 |
| 8796778 | Apparatuses and methods for transposing select gates | — | 2014-08-05 |
| 8792263 | Apparatuses and methods including memory with top and bottom data lines | — | 2014-07-29 |
| 8780638 | Random telegraph signal noise reduction scheme for semiconductor memories | — | 2014-07-15 |
| 8780631 | Memory devices having data lines included in top and bottom conductive lines | — | 2014-07-15 |
| 8743622 | Memory devices and programming methods that program a memory cell with a data value, read the data value from the memory cell and reprogram the memory cell with the read data value | — | 2014-06-03 |
| 8681561 | Apparatuses and methods including memory write operation | — | 2014-03-25 |
| 8675420 | Devices and systems including enabling circuits | Ali Feiz Zarrin Ghalam | 2014-03-18 |
| 8619471 | Apparatuses and methods including memory array data line selection | — | 2013-12-31 |
| 8611153 | Biasing system and method | — | 2013-12-17 |
| 8593869 | Apparatuses and methods including memory array and data line architecture | — | 2013-11-26 |
| 8547746 | Voltage generation and adjustment in a memory device | — | 2013-10-01 |
| 8537620 | Random telegraph signal noise reduction scheme for semiconductor memories | — | 2013-09-17 |
| 8466664 | Voltage trimming | — | 2013-06-18 |
| 8446784 | Level shifting circuit | — | 2013-05-21 |