Issued Patents All Time
Showing 101–116 of 116 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6073198 | System for peer-to-peer mastering over a computer bus | James W. Meyer | 2000-06-06 |
| 6058450 | Method and system for apportioning computer bus bandwith | — | 2000-05-02 |
| 6041380 | Method for increasing the number of devices capable of being operably connected to a host bus | — | 2000-03-21 |
| 6012148 | Programmable error detect/mask utilizing bus history stack | Gregory B. Wiedenman | 2000-01-04 |
| 5991843 | Method and system for concurrent computer transaction processing | A. Kent Porterfield, Joe M. Jeddeloh | 1999-11-23 |
| 5978872 | Method and system for concurrent computer transaction processing | A. Kent Porterfield, Joe M. Jeddeloh | 1999-11-02 |
| 5905878 | Method for controlling access to a computer bus | — | 1999-05-18 |
| 5878235 | Method and system for concurrent computer transaction processing | A. Kent Porterfield, Joe M. Jeddeloh | 1999-03-02 |
| 5822549 | Computer system and bus controller for controlling access to a computer bus | — | 1998-10-13 |
| 5815674 | Method and system for interfacing a plurality of bus requesters with a computer bus | — | 1998-09-29 |
| 5784382 | Method and apparatus for dynamically testing a memory within a computer system | Larry L. Byers, Gary R. Robeck, Terry J. Brunmeier, Randy L. DeGarmo | 1998-07-21 |
| 5771358 | Method and system for apportioning computer bus bandwidth | — | 1998-06-23 |
| 5740380 | Method and system for apportioning computer bus bandwidth | Joe M. Jeddeloh, A. Kent Porterfield | 1998-04-14 |
| 5671369 | Bus grant overlap circuit | Gregory B. Wiedenman, Donald E. Harding | 1997-09-23 |
| 5664089 | Multiple power domain power loss detection and interface disable | Larry L. Byers, David J. Tanglin, Gregory B. Wiedenman | 1997-09-02 |
| 5515501 | Redundant maintenance architecture | Larry L. Byers, Greg Wiedenman | 1996-05-07 |