Issued Patents All Time
Showing 76–100 of 116 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6728150 | Method and apparatus for supplementary command bus | — | 2004-04-27 |
| 6714460 | System and method for multiplexing data and data masking information on a data bus of a memory device | — | 2004-03-30 |
| 6684303 | Method and device to use memory access request tags | — | 2004-01-27 |
| 6678803 | Method and device to use memory access request tags | — | 2004-01-13 |
| 6654833 | Bus arbitration | — | 2003-11-25 |
| 6647541 | Circuit synthesis time budgeting based upon wireload information | — | 2003-11-11 |
| 6615345 | System and method for regulating data capture in response to data strobe using preamble, postamble and strobe signature | — | 2003-09-02 |
| 6601228 | Method for modifying an integrated circuit | — | 2003-07-29 |
| 6526497 | Memory cache with sequential page indicators | Douglas A. Larson | 2003-02-25 |
| 6467043 | Adjusting and measuring the timing of a data strobe signal with a first delay line and through additional delay line adapted to receive pulse signal | — | 2002-10-15 |
| 6425045 | Reducing memory latency by not performing bank conflict checks on idle banks | — | 2002-07-23 |
| 6370644 | Device for blocking bus transactions during reset | — | 2002-04-09 |
| 6356953 | System for peer-to-peer mastering over a computer bus | James W. Meyer | 2002-03-12 |
| 6330654 | Memory cache with sequential page indicators | Douglas A. Larson | 2001-12-11 |
| 6321315 | Method and apparatus to reduce memory read latency | — | 2001-11-20 |
| 6266734 | Reducing memory latency by not performing bank conflict checks on idle banks | — | 2001-07-24 |
| 6263389 | Apparatus for increasing the number of loads supported by a host bus | — | 2001-07-17 |
| 6233724 | Circuit synthesis time budgeting based upon wireload information | — | 2001-05-15 |
| 6233722 | Placing gates in an integrated circuit based upon drive strength | — | 2001-05-15 |
| 6223238 | Method of peer-to-peer mastering over a computer bus | James W. Meyer | 2001-04-24 |
| 6209118 | Method for modifying an integrated circuit | — | 2001-03-27 |
| 6145040 | Method and system for apportioning computer bus bandwidth | Joe M. Jeddeloh, A. Kent Porterfield | 2000-11-07 |
| 6134656 | Method for blocking bus transactions during reset | — | 2000-10-17 |
| 6108778 | Device for blocking bus transactions during reset | — | 2000-08-22 |
| 6075381 | Programmable logic block in an integrated circuit | — | 2000-06-13 |