Issued Patents All Time
Showing 25 most recent of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9652412 | Method and apparatus for sending data from multiple sources over a communications bus | Kirsten (Renick) Lunzer | 2017-05-16 |
| 8806152 | Method and apparatus for sending data from multiple sources over a communications bus | Kirsten Renick | 2014-08-12 |
| 8589643 | Arbitration system and method for memory responses in a hub-based memory system | Cory Kanski | 2013-11-19 |
| 8327089 | Method and apparatus for sending data from multiple sources over a communications bus | Kirsten Renick | 2012-12-04 |
| 8095748 | Method and apparatus for sending data from multiple sources over a communications bus | Kirsten Renick | 2012-01-10 |
| 7779212 | Method and apparatus for sending data from multiple sources over a communications bus | Kirsten Renick | 2010-08-17 |
| 7370122 | Distributed configuration storage | Jake Klier | 2008-05-06 |
| 7277965 | Apparatus and methods for the automated creation of distributed configuration storage | Jake Klier | 2007-10-02 |
| 7152123 | Distributed configuration storage | Jake Klier | 2006-12-19 |
| 7120743 | Arbitration system and method for memory responses in a hub-based memory system | Cory Kanski | 2006-10-10 |
| 7103682 | Apparatus and methods for transmitting data to a device having distributed configuration storage | Jake Klier | 2006-09-05 |
| 6654832 | Method of initializing a processor and computer system | Terry M. Cronin | 2003-11-25 |
| 6591318 | Computer system having reduced number of bus bridge terminals | Terry M. Cronin | 2003-07-08 |
| 6571204 | Bus modeling language generator | — | 2003-05-27 |
| 6560680 | System controller with Integrated low latency memory using non-cacheable memory physically distinct from main memory | — | 2003-05-06 |
| 6535841 | Method for testing a controller with random constraints | — | 2003-03-18 |
| 6453448 | Functional level configuration of input-output test circuitry | — | 2002-09-17 |
| 6434720 | Method of checking data integrity for a RAID 1 system | — | 2002-08-13 |
| 6425056 | Method for controlling a direct mapped or two way set associative cache memory in a computer system | — | 2002-07-23 |
| 6397299 | Reduced latency memory configuration method using non-cacheable memory physically distinct from main memory | — | 2002-05-28 |
| 6378047 | System and method for invalidating set-associative cache memory with simultaneous set validity determination | — | 2002-04-23 |
| 6366407 | Lenticular image product with zoom image effect | Jose E. Rivera, Alan L. Wertheimer, Kathryn B. Lomb, Roger R. A. Morton | 2002-04-02 |
| 6356953 | System for peer-to-peer mastering over a computer bus | Paul A. LaBerge | 2002-03-12 |
| 6223238 | Method of peer-to-peer mastering over a computer bus | Paul A. LaBerge | 2001-04-24 |
| 6076180 | Method for testing a controller with random constraints | — | 2000-06-13 |