LP

Luca Porzio

Micron: 76 patents #203 of 6,345Top 4%
SS Stmicroelectronics Sa: 1 patents #2,729 of 4,662Top 60%
📍 Villaggio Carrà, IT: #1 of 1 inventorsTop 100%
Overall (All Time): #21,913 of 4,157,543Top 1%
81
Patents All Time

Issued Patents All Time

Showing 51–75 of 81 patents

Patent #TitleCo-InventorsDate
10977198 Hybrid memory system interface Danilo Caraccio, Marco Dallabora, Daniele Balluchi, Paolo Amato 2021-04-13
10915321 Apparatuses and methods for memory operations having variable latencies Graziano Mirichigni, Corrado Villa, Chee Weng Tan, Sebastien LeMarie, Andre Klindworth 2021-02-09
10891223 Storage class memory status Graziano Mirichigni, Danilo Caraccio 2021-01-12
10885957 Apparatuses and methods for memory operations having variable latencies Graziano Mirichigni, Corrado Villa 2021-01-05
10860482 Apparatuses and methods for providing data to a configurable storage area Graziano Mirichigni, Erminio Di Martino, Giacomo Bernardi, Domenico Monteleone, Stefano Zanardi +3 more 2020-12-08
10839878 Memory sub-system managing remapping for misaligned memory components Marco Di Pasqua, Paolo Papa 2020-11-17
10809942 Latency-based storage in a hybrid memory system Danilo Caraccio, Emanuele Confalonieri, Marco Dallabora, Roberto Izzi, Paolo Amato +1 more 2020-10-20
10740263 Apparatuses and methods for variable latency memory operations Graziano Mirichigni, Daniele Balluchi 2020-08-11
10705747 Latency-based storage in a hybrid memory system Danilo Caraccio, Emanuele Confalonieri, Marco Dallabora, Roberto Izzi, Paolo Amato +1 more 2020-07-07
10705963 Latency-based storage in a hybrid memory system Danilo Caraccio, Emanuele Confalonieri, Marco Dallabora, Roberto Izzi, Paolo Amato +1 more 2020-07-07
10642728 Storage class memory status Graziano Mirichigni, Danilo Caraccio 2020-05-05
10445228 Methods and apparatuses for requesting ready status information from a memory Graziano Mirichigni, Danilo Caraccio 2019-10-15
10365835 Apparatuses and methods for performing write count threshold wear leveling operations Domenico Monteleone, Giacomo Bernardi, Graziano Mirichigni, Stefano Zanardi, Erminio Di Martino 2019-07-30
10223263 Apparatuses and methods for providing data to a configurable storage area Graziano Mirichigni, Erminio Di Martino, Giacomo Bernardi, Domenico Monteleone, Stefano Zanardi +3 more 2019-03-05
10163472 Apparatuses and methods for memory operations having variable latencies Graziano Mirichigni, Corrado Villa 2018-12-25
10108372 Methods and apparatuses for executing a plurality of queued tasks in a memory Giuseppe D'Eliseo, Graziano Mirichigni, Danilo Caraccio, Antonino Pollio 2018-10-23
10067764 Apparatuses and methods for memory operations having variable latencies Graziano Mirichigni, Corrado Villa, Chee Weng Tan, Sebastien LeMarie, Andre Klindworth 2018-09-04
10067890 Apparatuses and methods for variable latency memory operations Graziano Mirichigni, Daniele Balluchi 2018-09-04
9977603 Memory devices for detecting known initial states and related methods and electronic systems Graziano Mirichigni, Danilo Caraccio 2018-05-22
9928171 Apparatuses and methods for providing data to a configurable storage area Graziano Mirichigni, Erminio Di Martino, Giacomo Bernardi, Domenico Monteleone, Stefano Zanardi +3 more 2018-03-27
9852781 Dynamically allocable regions in non-volatile memories Emanuele Confalonieri, Giuseppe Russo 2017-12-26
9824004 Methods and apparatuses for requesting ready status information from a memory Graziano Mirichigni, Danilo Caraccio 2017-11-21
9754648 Apparatuses and methods for memory operations having variable latencies Graziano Mirichigni, Corrado Villa 2017-09-05
9740485 Apparatuses and methods for memory operations having variable latencies Graziano Mirichigni, Corrado Villa, Chee Weng Tan, Sebastien LeMarie, Andre Klindworth 2017-08-22
9734097 Apparatuses and methods for variable latency memory operations Graziano Mirichigni, Daniele Balluchi 2017-08-15