Issued Patents All Time
Showing 151–175 of 217 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6894915 | Method to prevent bit line capacitive coupling | — | 2005-05-17 |
| 6890843 | Methods of forming semiconductor structures | Leonard Forbes, Kie Y. Ahn | 2005-05-10 |
| 6875646 | Semiconductor processing methods of forming integrated circuitry | — | 2005-04-05 |
| 6861691 | Selective polysilicon stud growth | — | 2005-03-01 |
| 6844591 | Method of forming DRAM access transistors | — | 2005-01-18 |
| 6834019 | Isolation device over field in a memory device | Stephen R. Porter, Scot M. Graham, Steven E. Howell | 2004-12-21 |
| 6825077 | Method of forming memory cells and a method of isolating a single row of memory cells | — | 2004-11-30 |
| 6806123 | Methods of forming isolation regions associated with semiconductor constructions | Mark McQueen, Chandra Mouli | 2004-10-19 |
| 6806137 | Trench buried bit line memory devices and methods thereof | Mark Durcan, Howard C. Kirsch | 2004-10-19 |
| 6803278 | Method of forming memory cells in an array | — | 2004-10-12 |
| 6790663 | Methods of contacting lines and methods of forming an electrical contact in a semiconductor device | Robert Kerr, Brian M. Shirley, Tyler Lowrey | 2004-09-14 |
| 6784502 | Method of forming contacts, methods of contacting lines, methods of operating integrated circuitry, and integrated circuits | Robert Kerr, Brian M. Shirley, Tyler Lowrey | 2004-08-31 |
| 6780728 | Semiconductor constructions, and methods of forming semiconductor constructions | — | 2004-08-24 |
| 6764934 | Semiconductor processing methods of forming contact openings, methods of forming memory circuitry, methods of forming electrical connections, and methods of forming dynamic random | Pai-Hung Pan, Tyler Lowrey | 2004-07-20 |
| 6759288 | Double LDD devices for improved DRAM refresh | Mark McQueen, Robert Kerr | 2004-07-06 |
| 6756619 | Semiconductor constructions | — | 2004-06-29 |
| 6753243 | SEMICONDUCTOR PROCESSING METHODS OF FORMING CONTACT OPENINGS, METHODS OF FORMING MEMORY CIRCUITRY, METHODS OF FORMING ELECTRICAL CONNECTIONS, AND METHODS OF FORMING DYNAMIC RANDOM ACCESS MEMORY (DRAM) CIRCUITRY | Pai-Hung Pan, Tyler Lowrey | 2004-06-22 |
| 6747326 | Low voltage high performance semiconductor device having punch through prevention implants | — | 2004-06-08 |
| 6734510 | Technique to mitigate short channel effects with vertical gate transistor with different gate materials | Leonard Forbes, Kie Y. Ahn | 2004-05-11 |
| 6734482 | Trench buried bit line memory devices | Mark Durcan, Howard C. Kirsch | 2004-05-11 |
| 6734487 | Memory integrated circuitry with DRAMs using LOCOS isolations and areas less than 6F2 | Alan R. Reinberg | 2004-05-11 |
| 6720638 | Semiconductor constructions, and methods of forming semiconductor constructions | — | 2004-04-13 |
| 6688584 | Compound structure for reduced contact resistance | Ravi Iyer, Yongjun Jeff Hu, Brent Gilgen | 2004-02-10 |
| 6660584 | Selective polysilicon stud growth of 6F2 memory cell manufacturing having a convex upper surface profile | — | 2003-12-09 |
| 6649962 | Selective polysilicon stud growth | — | 2003-11-18 |