Issued Patents All Time
Showing 726–750 of 1,109 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6838723 | Merged MOS-bipolar capacitor memory cell | — | 2005-01-04 |
| 6835638 | Silicon carbide gate transistor and fabrication process | Kie Y. Ahn | 2004-12-28 |
| 6835111 | Field emission display having porous silicon dioxide layer | Kie Y. Ahn | 2004-12-28 |
| 6833317 | High permeability composite films to reduce noise in high speed interconnects | Kie Y. Ahn, Salman Akram | 2004-12-21 |
| 6833308 | Structure and method for dual gate oxide thicknesses | Kie Y. Ahn | 2004-12-21 |
| 6833285 | Method of making a chip packaging device having an interposer | Kie Y. Ahn | 2004-12-21 |
| 6830963 | Fully depleted silicon-on-insulator CMOS logic | — | 2004-12-14 |
| 6829421 | Hollow core photonic bandgap optical fiber | Joseph E. Geusic | 2004-12-07 |
| 6828656 | High performance silicon contact for flip chip and a system using same | Kie Y. Ahn | 2004-12-07 |
| 6825747 | Integrated circuit inductors | Kie Y. Ahn | 2004-11-30 |
| 6822545 | Integrated circuit inductors | Kie Y. Ahn | 2004-11-23 |
| 6821802 | Silicon interposer with optical connections | Kie Y. Ahn | 2004-11-23 |
| 6818937 | Memory cell having a vertical transistor with buried source/drain and dual gates | Wendell P. Noble, Kie Y. Ahn | 2004-11-16 |
| 6817087 | Integrated circuit inductors | Kie Y. Ahn | 2004-11-16 |
| 6815804 | High permeability composite films to reduce noise in high speed interconnects | Kie Y. Ahn, Salman Akram | 2004-11-09 |
| 6815303 | Bipolar transistors with low-resistance emitter contacts | Kie Y. Ahn | 2004-11-09 |
| 6813180 | FOUR TERMINAL MEMORY CELL, A TWO-TRANSISTOR SRAM CELL, A SRAM ARRAY, A COMPUTER SYSTEM, A PROCESS FOR FORMING A SRAM CELL, A PROCESS FOR TURNING A SRAM CELL OFF, A PROCESS FOR WRITING A SRAM CELL AND A PROCESS FOR READING DATA FROM A SRAM CELL | — | 2004-11-02 |
| 6812516 | Field programmable logic arrays with vertical transistors | Wendell P. Noble | 2004-11-02 |
| 6812513 | Method and structure for high capacitance memory cells | Joseph E. Geusic, Kie Y. Ahn | 2004-11-02 |
| 6812137 | Method of forming coaxial integrated circuitry interconnect lines | Kie Y. Ahn | 2004-11-02 |
| 6812109 | Integrated decoupling capacitors | Kie Y. Ahn | 2004-11-02 |
| 6812100 | Evaporation of Y-Si-O films for medium-k dielectrics | Kie Y. Ahn | 2004-11-02 |
| 6809985 | DRAM technology compatible processor/memory chips | Eugene H. Cloud, Wendell P. Noble | 2004-10-26 |
| 6806805 | Low loss high Q inductor | Kie Y. Ahn | 2004-10-19 |
| 6804142 | 6F2 3-transistor DRAM gain cell | — | 2004-10-12 |