LH

Lars Heineck

Micron: 19 patents #907 of 6,345Top 15%
Infineon Technologies Ag: 9 patents #986 of 7,486Top 15%
NT Nanya Technology: 7 patents #114 of 775Top 15%
QA Qimonda Ag: 2 patents #153 of 575Top 30%
SA Siemens Aktiengesellschaft: 2 patents #6,658 of 22,248Top 30%
IBM: 1 patents #44,794 of 70,183Top 65%
📍 Boise, ID: #269 of 3,546 inventorsTop 8%
🗺 Idaho: #362 of 8,810 inventorsTop 5%
Overall (All Time): #77,659 of 4,157,543Top 2%
40
Patents All Time

Issued Patents All Time

Showing 26–40 of 40 patents

Patent #TitleCo-InventorsDate
8361856 Memory cells, arrays of memory cells, and methods of forming memory cells Jaydip Guha 2013-01-29
8138538 Interconnect structure for semiconductor devices Hans-Peter Moll, Gouri Sankar Kar, Martin Popp, Peter Lahnor, Arnd Scholz +8 more 2012-03-20
7838928 Word line to bit line spacing method and apparatus Werner Graf, Martin Popp 2010-11-23
7314803 Method for producing a semiconductor structure Werner Graf, Jana Horst 2008-01-01
7274060 Memory cell array and method of forming the same Martin Popp, Frank Jakubowski, Juergen Holz 2007-09-25
7094674 Method for production of contacts on a wafer Werner Graf, Henning Haffner, Johannes Kowalewski 2006-08-22
7087492 Method for fabricating transistors of different conduction types and having different packing densities in a semiconductor substrate Martin Popp 2006-08-08
7018781 Method for fabricating a contact hole plane in a memory module Hans-Georg Fröhlich, Oliver Genz, Werner Graf, Stefan Gruss, Matthias Handke +6 more 2006-03-28
7012313 MOS transistor in a single-transistor memory cell having a locally thickened gate oxide Giorgio Schweeger 2006-03-14
6919255 Semiconductor trench structure Albert Birner, Matthias Goldbach, Thomas Hecht, Stephan Kudelka, Jorn Lutzen +2 more 2005-07-19
6916721 Method for fabricating a trench capacitor with an insulation collar Stephan Kudelka, Jorn Lutzen, Hans-Peter Moll, Martin Popp, Till Schlosser +1 more 2005-07-12
6423607 Trench capacitor with insulation collar and corresponding fabrication method Tobias Jacobs 2002-07-23
6342452 Method of fabricating a Si3N4/polycide structure using a dielectric sacrificial layer as a mask Philippe Coronel, Pascal Costaganna 2002-01-29
6281079 MOS transistor in a single-transistor memory cell having a locally thickened gate oxide, and production process Giorgio Schweeger 2001-08-28
5998254 Method for creating a conductive connection between at least two zones of a first conductivity type 1999-12-07