Issued Patents All Time
Showing 26–36 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11309052 | Read voltage calibration for copyback operation | Kishore Kumar Muchherla, Niccolo' Righetti, Jeffrey S. McNeil, Akira Goda, Todd A. Marquart +4 more | 2022-04-19 |
| 11301346 | Separate trims for buffer and snapshot | Todd A. Marquart, Niccolo′ Righetti, Jeffrey S. McNeil, Akira Goda, Kishore Kumar Muchherla +4 more | 2022-04-12 |
| 11288160 | Threshold voltage distribution adjustment for buffer | Jeffrey S. McNeil, Niccolo′ Righetti, Kishore Kumar Muchherla, Akira Goda, Todd A. Marquart +4 more | 2022-03-29 |
| 11189355 | Read window based on program/erase cycles | Vamsi Pavan Rayaprolu, Karl D. Schuh, Jeffrey S. McNeil, Kishore Kumar Muchherla, Ashutosh Malshe +1 more | 2021-11-30 |
| 10346088 | Method and apparatus for per-deck erase verify and dynamic inhibit in 3d NAND | Niccolo′ Righetti, Akira Goda, Violante Moschiano, Christian Caillat | 2019-07-09 |
| 9490025 | Methods of programming memory devices | Akira Goda, Andrew Bicksler, Violante Moschiano | 2016-11-08 |
| 8767467 | In-field block retiring | Krishna K. Parat, Akira Goda, Koichi Kawal, Brian J. Soderling, Jeremy Binfet +3 more | 2014-07-01 |
| 8619474 | Data line management in a memory device | Akira Goda, Andrew Bicksler, Violante Moschiano | 2013-12-31 |
| 8514624 | In-field block retiring | Krishna K. Parat, Akira Goda, Koichi Kawai, Brian J. Soderling, Jeremy Binfet +3 more | 2013-08-20 |
| 8369158 | Erase operations and apparatus for a memory device | Akira Goda | 2013-02-05 |
| 8228735 | Memory array having memory cells coupled between a programmable drain select gate and a non-programmable source select gate | Andrew Bicksler, Akira Goda | 2012-07-24 |