Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7026666 | Self-aligned NPN transistor with raised extrinsic base | Alexander Kalnitsky, Alexel Shatalov, Michael Rowlandson, Sang-Hoon Park, Fanling H. Yang | 2006-04-11 |
| 6861324 | Method of forming a super self-aligned hetero-junction bipolar transistor | Alexander Kalnitsky, Michael Rowlandson, Ken Liao | 2005-03-01 |
| 6855585 | Integrating multiple thin film resistors | Alexander Kalnitsky, Joseph Paul Elull, Ralph N. Wall, Jonathan François Cornelis Herman, Glenn Nobinger +1 more | 2005-02-15 |
| 6767798 | Method of forming self-aligned NPN transistor with raised extrinsic base | Alexander Kalnitsky, Alexei Shatalov, Michael Rowlandson, Sang-Hoon Park, Fanling H. Yang | 2004-07-27 |
| 6686250 | Method of forming self-aligned bipolar transistor | Alexander Kalnitsky, Michael Rowlandson, Fanling H. Yang, Sang-Hoon Park | 2004-02-03 |
| 6593200 | Method of forming an integrated inductor and high speed interconnect in a planarized process with shallow trench isolation | Alexander Kalnitsky, Dmitri A. Choutov, Geoffrey C. Stutzin | 2003-07-15 |
| 6492237 | Method of forming an NPN device | Alexander Kalnitsky, Sang-Hoon Park | 2002-12-10 |
| 6489217 | Method of forming an integrated circuit on a low loss substrate | Alexander Kalnitsky | 2002-12-03 |
| 6475873 | Method of forming laser trimmable thin-film resistors in a fully planarized integrated circuit technology | Alexander Kalnitsky, Joseph P. Ellul | 2002-11-05 |
| 6303413 | Method of forming a shallow and deep trench isolation (SDTI) suitable for silicon on insulator (SOI) substrates | Alexander Kalnitsky, Dmitri A. Choutov, Fanling H. Yang, Thomas W. Dobson, Tadanori Yamaguchi +2 more | 2001-10-16 |