Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6593200 | Method of forming an integrated inductor and high speed interconnect in a planarized process with shallow trench isolation | Alexander Kalnitsky, Dmitri A. Choutov, Robert F. Scheer | 2003-07-15 |
| 6479394 | Method of low-selective etching of dissimilar materials having interfaces at non-perpendicular angles to the etch propagation direction | Dmitri A. Choutov, Alexander Kalnitsky | 2002-11-12 |
| 6303413 | Method of forming a shallow and deep trench isolation (SDTI) suitable for silicon on insulator (SOI) substrates | Alexander Kalnitsky, Dmitri A. Choutov, Robert F. Scheer, Fanling H. Yang, Thomas W. Dobson +2 more | 2001-10-16 |