FY

Fanling H. Yang

MP Maxim Integrated Products: 7 patents #89 of 945Top 10%
📍 Beaverton, OR: #774 of 3,140 inventorsTop 25%
🗺 Oregon: #5,706 of 28,073 inventorsTop 25%
Overall (All Time): #732,177 of 4,157,543Top 20%
7
Patents All Time

Issued Patents All Time

Showing 1–7 of 7 patents

Patent #TitleCo-InventorsDate
9673316 Vertical semiconductor device having frontside interconnections Christopher S. Blair, Albert Bergemont, Sudarsan Uppili, Guillaume Bouche 2017-06-06
9450074 LDMOS with field plate connected to gate Timothy K. McGuire, Sudarsan Uppili, Guillaume Bouche 2016-09-20
9209091 Integrated monolithic galvanic isolator David Harper, Sudarsan Uppili, David L. Snyder, Christopher S. Blair, Guillaume Bouche 2015-12-08
7026666 Self-aligned NPN transistor with raised extrinsic base Alexander Kalnitsky, Alexel Shatalov, Michael Rowlandson, Sang-Hoon Park, Robert F. Scheer 2006-04-11
6767798 Method of forming self-aligned NPN transistor with raised extrinsic base Alexander Kalnitsky, Alexei Shatalov, Michael Rowlandson, Sang-Hoon Park, Robert F. Scheer 2004-07-27
6686250 Method of forming self-aligned bipolar transistor Alexander Kalnitsky, Michael Rowlandson, Sang-Hoon Park, Robert F. Scheer 2004-02-03
6303413 Method of forming a shallow and deep trench isolation (SDTI) suitable for silicon on insulator (SOI) substrates Alexander Kalnitsky, Dmitri A. Choutov, Robert F. Scheer, Thomas W. Dobson, Tadanori Yamaguchi +2 more 2001-10-16