Issued Patents All Time
Showing 76–100 of 250 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9620217 | Sub-block erase | Kuo-Pin Chang | 2017-04-11 |
| 9530503 | And-type SGVC architecture for 3D NAND flash | Kuo-Pin Chang | 2016-12-27 |
| 9524980 | U-shaped vertical thin-channel memory | — | 2016-12-20 |
| 9520485 | 3D independent double gate flash memory on bounded conductor layer | — | 2016-12-13 |
| 9490249 | Antenna effect discharge circuit and manufacturing method | Teng-Hao Yeh | 2016-11-08 |
| 9490017 | Forced-bias method in sub-block erase | Kuo-Pin Chang, Wen-Wei Yeh | 2016-11-08 |
| 9461175 | Dual-mode memory devices and methods for operating same | Wei-Chen Chen | 2016-10-04 |
| 9425191 | Memory device and manufacturing method of the same | Yi-Hsuan Hsiao, Yen-Hao Shih, Shih-Hung Chen | 2016-08-23 |
| 9401369 | Memory device and method for fabricating the same | Shih-Hung Chen | 2016-07-26 |
| 9397110 | 3D independent double gate flash memory | — | 2016-07-19 |
| 9391084 | Bandgap-engineered memory with multiple charge trapping layers storing charge | — | 2016-07-12 |
| 9385184 | Active device and semiconductor device with the same | — | 2016-07-05 |
| 9385203 | Active device and high voltage-semiconductor device with the same | — | 2016-07-05 |
| 9379129 | Assist gate structures for three-dimensional (3D) vertical gate array memory structure | Wei-Chen Chen | 2016-06-28 |
| 9356105 | Ring gate transistor design for flash memory | — | 2016-05-31 |
| 9349745 | 3D NAND nonvolatile memory with staggered vertical gates | — | 2016-05-24 |
| 9348748 | Heal leveling | Yu-Ming Chang, Hsiang-Pang Li, Yuan-Hao Chang, Tei-Wei Kuo | 2016-05-24 |
| 9331204 | High voltage field effect transistors and circuits utilizing the same | — | 2016-05-03 |
| 9324437 | Systems and methods for trimming control transistors for 3D NAND flash | Kuo-Pin Chang, Chih-Shen Chang | 2016-04-26 |
| 9305653 | Memory array and operating method of same | Chih-Chang Hsieh, Kuo-Pin Chang | 2016-04-05 |
| 9287406 | Dual-mode transistor devices and methods for operating same | Wei-Chen Chen | 2016-03-15 |
| 9287291 | Multiple-bit-per-cell, independent double gate, vertical channel memory having split channel | — | 2016-03-15 |
| 9269660 | Multilayer connection structure | Shih-Hung Chen, Hong-Ji Lee, Chin-Cheng Yang | 2016-02-23 |
| 9263143 | Three dimensional memory device and data erase method thereof | Tzu-Hsuan Hsu, Chen-Jun Wu | 2016-02-16 |
| 9252155 | Memory device and method for manufacturing the same | Tzu-Hsuan Hsu, Wei-Chen Chen | 2016-02-02 |