Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9257200 | Bit error testing and training in double data rate (DDR) memory system | Dharmesh Bhakta, Curtis M. Webster | 2016-02-09 |
| 8819354 | Feedback programmable data strobe enable architecture for DDR memory applications | Hui-Yin Seto, Cheng-Gang Kong | 2014-08-26 |
| 8098073 | System for terminating high speed input/output buffers in an automatic test equipment environment to enable external loopback testing | Hong-Him Lim, David Carkeek | 2012-01-17 |
| 7969799 | Multiple memory standard physical layer macro function | Cheng-Gang Kong, Terence J. Magee, Thomas Hughes | 2011-06-28 |
| 7865661 | Configurable high-speed memory interface subsystem | Cheng-Gang Kong, Terence J. Magee | 2011-01-04 |
| 7443741 | DQS strobe centering (data eye training) method | Hui-Yin Seto | 2008-10-28 |
| 7437500 | Configurable high-speed memory interface subsystem | Cheng-Gang Kong, Terence J. Magee | 2008-10-14 |
| 7394707 | Programmable data strobe enable architecture for DDR memory applications | Hui-Yin Seto | 2008-07-01 |
| 7215584 | Method and/or apparatus for training DQS strobe gating | Hui-Yin Seto | 2007-05-08 |