Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9257200 | Bit error testing and training in double data rate (DDR) memory system | Dharmesh Bhakta, Derrick Sai-Tang Butt | 2016-02-09 |
| 8422319 | System and method for gate training in a memory system | Srinivas Sriadibhatla | 2013-04-16 |