Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8566769 | Method and apparatus for generating memory models and timing database | Andrey Nikitin, Ranko Scepanovic, Igor Vikhliantsev | 2013-10-22 |
| 8312072 | Universal Galois field multiplier | Sergei B. Gashkov | 2012-11-13 |
| 8245168 | Method and apparatus for generating memory models and timing database | Andrey Nikitin, Ranko Scepanovic, Igor Vikhliantsev | 2012-08-14 |
| 8209589 | Reed-solomon decoder with a variable number of correctable errors | Ilya V. Neznanov, Elyar E. Gasanov, Pavel A. Panteleev | 2012-06-26 |
| 8176397 | Variable redundancy reed-solomon encoder | Pavel A. Panteleev, Elyar E. Gasanov, Ilya V. Neznanov | 2012-05-08 |
| 8156391 | Data controlling in the MBIST chain architecture | Anatoli Bolotov, Mikhail I. Grinchuk | 2012-04-10 |
| 8046643 | Transport subsystem for an MBIST chain architecture | Anatoli Bolotov, Mikhail I. Grinchuk | 2011-10-25 |
| 8037432 | Method and apparatus for mapping design memories to integrated circuit layout | Andrey Nikitin, Ilya V. Neznanov, Ranko Scepanovic | 2011-10-11 |
| 7949909 | Address controlling in the MBIST chain architecture | Anatoli Bolotov, Mikhail I. Grinchuk | 2011-05-24 |
| 7788563 | Generation of test sequences during memory built-in self testing of multiple memories | Anatoli Bolotov, Ranko Scepanovic | 2010-08-31 |
| 7584442 | Method and apparatus for generating memory models and timing database | Andrey Nikitin, Ranko Scepanovic, Igor Vikhliantsev | 2009-09-01 |
| 7424687 | Method and apparatus for mapping design memories to integrated circuit layout | Andrey Nikitin, Ilya V. Neznanov, Ranko Scepanovic | 2008-09-09 |
| 7389484 | Method and apparatus for tiling memories in integrated circuit layout | Andrey Nikitin, Ilya V. Neznanov, Ranko Scepanovic | 2008-06-17 |
| 7308633 | Master controller architecture | Sergey Gribok, Anatoli Bolotov | 2007-12-11 |
| 7207026 | Memory tiling architecture | Igor Vikhliantsev, Ivan Pavisic | 2007-04-17 |
| 7200826 | RRAM memory timing learning tool | Andrey Nikitin, Ranko Scepanovic | 2007-04-03 |
| 7155688 | Memory generation and placement | Ilya V. Neznanov, Andrey Nikitin, Ranko Scepanovic, Igor Vikhliantsev | 2006-12-26 |
| 7093228 | Method and system for classifying an integrated circuit for optical proximity correction | Ivan Pavisic, Lav D. Ivanovic | 2006-08-15 |
| 6845495 | Multidirectional router | Elyar E. Gasanov, Ranko Scepanovic | 2005-01-18 |
| 6757881 | Power routing with obstacles | Lav D. Ivanovic, Ivan Pavisic | 2004-06-29 |