GB

George E. Bailey

Lsi Logic: 12 patents #130 of 1,957Top 7%
LS Lsi: 1 patents #914 of 1,740Top 55%
GE: 1 patents #19,878 of 36,430Top 55%
Overall (All Time): #355,242 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7381502 Apparatus and method to improve the resolution of photolithography systems by improving the temperature stability of the reticle Michael Berman 2008-06-03
7298458 Optical error minimization in a semiconductor manufacturing apparatus Michael Berman 2007-11-20
7098996 Optical error minimization in a semiconductor manufacturing apparatus Michael Berman 2006-08-29
7023530 Dual source lithography for direct write application Michael Berman 2006-04-04
7005217 Chromeless phase shift mask Neal Callan, John V. Jensen 2006-02-28
6943055 Method and apparatus for detecting backside contamination during fabrication of a semiconductor wafer Michael Berman, Rennie Barber 2005-09-13
6934929 Method for improving OPC modeling Travis Brist 2005-08-23
6894762 Dual source lithography for direct write application Michael Berman 2005-05-17
6885436 Optical error minimization in a semiconductor manufacturing apparatus Michael Berman 2005-04-26
6866970 Apparatus and method to improve the resolution of photolithography systems by improving the temperature stability of the reticle Michael Berman 2005-03-15
6782525 Wafer process critical dimension, alignment, and registration analysis simulation tool Mario Garza, Neal Callan, Travis Brist, Paul G. Filseth 2004-08-24
6764749 Method to improve the resolution of a photolithography system by use of a coupling layer between the photo resist and the ARC Michael Berman 2004-07-20
6627466 Method and apparatus for detecting backside contamination during fabrication of a semiconductor wafer Michael Berman, Rennie Barber 2003-09-30
6102143 Shaped polycrystalline cutter elements Shelly R. Snyder, Eoin M. O'Tighearnaigh 2000-08-15