Issued Patents All Time
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8737117 | System and method to read a memory cell with a complementary metal-oxide-semiconductor (CMOS) read transistor | — | 2014-05-27 |
| 8466707 | Method and apparatus for testing a memory device | Hong Sun Kim, Paul Bassett | 2013-06-18 |
| 8397238 | Thread allocation and clock cycle adjustment in an interleaved multi-threaded processor | Suresh K. Venkumahanti, Martin Saint-Laurent, Lucian Codrescu | 2013-03-12 |
| 8127184 | System and method including built-in self test (BIST) circuit to test cache memory | — | 2012-02-28 |
| 7760576 | Systems and methods for low power, high yield memory | — | 2010-07-20 |
| 7746137 | Sequential circuit element including a single clocked transistor | Martin Saint-Laurent, Paul Bassett | 2010-06-29 |
| 7620778 | Low power microprocessor cache memory and method of operation | Muhammad Ahmed, Paul Bassett, Sujat Jamil, Ajay Anant Ingle | 2009-11-17 |
| 7567096 | Circuit device and method of controlling a voltage swing | Martin Saint-Laurent, Paul Bassett | 2009-07-28 |
| 7466620 | System and method for low power wordline logic for a memory | Paul Bassett | 2008-12-16 |