Issued Patents All Time
Showing 26–50 of 79 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6366490 | Semiconductor memory device using ferroelectric film | Yoshiaki Takeuchi | 2002-04-02 |
| 6349395 | Configurable integrated circuit and method of testing the same | Kazunori Ohuchi, Masako Yoshida, Hiroshige Fujii, Masatoshi Sekine | 2002-02-19 |
| 6342408 | Method of manufacturing semiconductor memory device | Masako Yoshida, Makoto Yoshimi | 2002-01-29 |
| 6327654 | Semiconductor integrated circuit for cryptographic process and encryption algorithm alternating method | Hiroshige Fujii, Hideo Shimizu, Takehisa Kato, Naoki Endo, Atsushi Masuda +3 more | 2001-12-04 |
| 6323525 | MISFET semiconductor device having relative impurity concentration levels between layers | Mitsuhiro Noguchi | 2001-11-27 |
| 6301185 | Random access memory with divided memory banks and data read/write architecture therefor | — | 2001-10-09 |
| 6295241 | Dynamic random access memory device | Shigeyoshi Watanabe, Tsuneaki Fuse, Koji Sakui, Masako Ohta, Kenji Numata +1 more | 2001-09-25 |
| 6278165 | MIS transistor having a large driving current and method for producing the same | Mizuki Ono, Mitsuhiro Noguchi, Daisaburo Takashima, Akira Nishiyama | 2001-08-21 |
| 6211686 | Evaluation apparatus and fabrication system for semiconductor | Kazuya Matsuzawa | 2001-04-03 |
| 6177811 | Semiconductor integrated circuit device | Tsuneaki Fuse, Yoko Shuto | 2001-01-23 |
| 6157997 | Processor and information processing apparatus with a reconfigurable circuit | Hiroshige Fujii, Masatoshi Sekine | 2000-12-05 |
| 6147918 | Dynamic semiconductor memory device having an improved sense amplifier layout arrangement | Daisaburo Takashima, Kenji Tsuchida | 2000-11-14 |
| 6130461 | Semiconductor memory device | Masako Yoshida, Makoto Yoshimi | 2000-10-10 |
| 6124744 | Electronic circuit apparatus having circuits for effectively compensating for clock skew | — | 2000-09-26 |
| 6118721 | Random access memory with divided memory banks and data read/write architecture therefor | — | 2000-09-12 |
| 6112163 | Semiconductor integrated circuit and test method therefor | Masatoshi Sekine, Hiroshige Fujii | 2000-08-29 |
| 6087893 | Semiconductor integrated circuit having suppressed leakage currents | Tsuneaki Fuse | 2000-07-11 |
| 6084453 | Clock converting circuit | Tsuneaki Fuse, Masahiro Kamoshida, Haruki Toda | 2000-07-04 |
| 6054371 | Method of manufacturing a semiconductor device by detachably mounting substrates to a holder board | Masakatsu Tsuchiaki, Yasushi Nakasaki, Akira Nishiyama, Hirotaka Nishino | 2000-04-25 |
| 6040610 | Semiconductor device | Mitsuhiro Noguchi | 2000-03-21 |
| 6026480 | Processor having bug avoidance function and method for avoiding bug in processor | Hiroshige Fujii, Masatoshi Sekine | 2000-02-15 |
| 5969998 | MOS semiconductor device with memory cells each having storage capacitor and transfer transistor | Daisuke Kato, Daisaburo Takashima | 1999-10-19 |
| 5953246 | Semiconductor memory device such as a DRAM capable of holding data without refresh | Daisaburo Takashima | 1999-09-14 |
| 5933380 | Semiconductor memory device having a multilayered bitline structure with respective wiring layers for reading and writing data | Kenji Tsuchida, Kazunori Ohuchi | 1999-08-03 |
| 5895956 | Semiconductor memory device | Masako Yoshida, Makoto Yoshimi | 1999-04-20 |