Issued Patents All Time
Showing 51–75 of 79 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5892724 | NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines | Takehiro Hasegawa, Fujio Masuoka, Ryu Ogiwara, Shinichiro Shiratake, Shigeyoshi Watanabe | 1999-04-06 |
| 5892247 | Semiconductor device and a manufacturing method thereof | Mitsuhiro Noguchi, Tohru Maruyama | 1999-04-06 |
| 5870339 | MOS semiconductor device with memory cells each having storage capacitor and transfer transistor | Daisuke Kato, Daisaburo Takashima | 1999-02-09 |
| 5867040 | Integrated circuit with stacked sub-circuits between Vcc and ground so as to conserve power and reduce the voltage across any one transistor | Tsuneaki Fuse | 1999-02-02 |
| 5864508 | Dynamic random-access memory with high-speed word-line driver circuit | Daisaburo Takashima, Kenji Tsuchida, Masako Ohta | 1999-01-26 |
| 5859805 | Dynamic semiconductor memory device having an improved sense amplifier layout arrangement | Daisaburo Takashima, Kenji Tsuchida | 1999-01-12 |
| 5838038 | Dynamic random access memory device with the combined open/folded bit-line pair arrangement | Daisaburo Takashima, Shigeyoshi Watanabe, Tohru Ozaki, Takeshi Hamamoto | 1998-11-17 |
| 5831928 | Semiconductor memory device including a plurality of dynamic memory cells connected in series | Hiroaki Nakano, Takehiro Hasegawa | 1998-11-03 |
| 5761109 | Semiconductor memory device having folded bit line array and an open bit line array with imbalance correction | Daisaburo Takashima, Tsuneo Inaba, Takashi Ohsawa, Shinichiro Shiratake | 1998-06-02 |
| 5717625 | Semiconductor memory device | Takehiro Hasegawa, Shigeyoshi Watanabe, Ken Maeda, Mitsuo Saito, Masako Yoshida +2 more | 1998-02-10 |
| 5684746 | Semiconductor memory device in which a failed memory cell is placed with another memory cell | Ryo Fukuda | 1997-11-04 |
| 5661678 | Semiconductor memory device using dynamic type memory cells | Masako Yoshida, Takehiro Hasegawa, Kiyofumi Ochii, Masayuki Koizumi | 1997-08-26 |
| 5654912 | Semiconductor memory device with reduced read time and power consumption | Takehiro Hasegawa, Hitoshi Kuyama | 1997-08-05 |
| 5644525 | Dynamic semiconductor memory device having an improved sense amplifier layout arrangement | Daisaburo Takashima, Kenji Tsuchida | 1997-07-01 |
| 5638329 | MOS semiconductor device with memory cells each having storage capacitor and transfer transistor | Daisuke Kato, Daisaburo Takashima | 1997-06-10 |
| 5625602 | NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines | Takehiro Hasegawa, Fujio Masuoka, Ryu Ogiwara, Shinichiro Shiratake, Shigeyoshi Watanabe | 1997-04-29 |
| 5590080 | Dynamic random access memory with variable sense-amplifier drive capacity | Takehiro Hasagawa | 1996-12-31 |
| 5499209 | Integrated semiconductor memory with internal voltage booster of lesser dependency on power supply voltage | Daisaburo Takashima, Masako Ohta | 1996-03-12 |
| 5497351 | Random access memory with divided memory banks and data read/write architecture therefor | — | 1996-03-05 |
| 5463577 | Semiconductor memory | Takehiro Hasegawa | 1995-10-31 |
| 5426604 | MOS semiconductor device with memory cells each having storage capacitor and transfer transistor | Daisuke Kato, Daisaburo Takashima | 1995-06-20 |
| 5307315 | Integrated semiconductor memory with internal voltage booster of lesser dependency on power supply voltage | Daisaburo Takashima, Masako Ohta | 1994-04-26 |
| 5299154 | MOS semiconductor device with memory cells each having storage capacitor and transfer transistor | Daisuke Kato, Daisaburo Takashima | 1994-03-29 |
| 5222038 | Dynamic random access memory with enhanced sense-amplifier circuit | Kenji Tsuchida, Daisaburo Takashima | 1993-06-22 |
| 5144583 | Dynamic semiconductor memory device with twisted bit-line structure | Kenji Tsuchida, Daisaburo Takashima | 1992-09-01 |