Issued Patents All Time
Showing 1–25 of 30 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5677229 | Method for manufacturing semiconductor device isolation region | Shigeru Morita, Fumitomo Matsuoka, Hisao Yoshimura | 1997-10-14 |
| 5597757 | Method of manufacturing a semiconductor device including bipolar and MOS transistors | Hiroshi Momose | 1997-01-28 |
| 5583363 | Inverter gate circuit of a bi-CMOS structure having common layers between fets and bipolar transistors | Hiroshi Momose, Koji Makita | 1996-12-10 |
| 5576572 | Semiconductor integrated circuit device and method of manufacturing the same | Hiroshi Gojohbori | 1996-11-19 |
| 5523242 | Method of manufacturing a BiMOS device | Hiroshi Momose | 1996-06-04 |
| 5512772 | Semiconductor device having bipolar transistor and MOS transistor | Hiroshi Momose, Yukihiro Urakawa, Masataka Matsui | 1996-04-30 |
| 5506168 | Method for manufacturing semiconductor device | Shigeru Morita, Fumitomo Matsuoka, Hisao Yoshimura | 1996-04-09 |
| 5489795 | Semiconductor integrated circuit device having double well structure | Hisao Yoshimura, Masakazu Kakumu | 1996-02-06 |
| 5485034 | Semiconductor device including bipolar transistor having shallowed base | Hiroshi Gojohbori, Yoshitaka Tsunashima | 1996-01-16 |
| 5442226 | Bipolar transistor having an emitter electrode formed of polysilicon | Hiroshi Gojohbori, Takeo Nakayama | 1995-08-15 |
| 5406115 | Semiconductor device including bipolar transistor having shallowed base and method for manufacturing the same | Hiroshi Gojohbori, Yoshitaka Tsunashima | 1995-04-11 |
| 5399894 | Semiconductor device having bipolar transistor and MOS transistor | Hiroshi Momose, Yukihiro Urakawa, Masataka Matsui | 1995-03-21 |
| 5340751 | Method of manufacturing a BiMOS device | Hiroshi Momose | 1994-08-23 |
| 5341021 | Bipolar transistor having an electrode structure suitable for integration | Hiroshi Momose | 1994-08-23 |
| 5278099 | Method for manufacturing a semiconductor device having wiring electrodes | — | 1994-01-11 |
| 5243557 | Bi-CMOS semiconductor integrated circuit | Yukari Unno, Hiroshi Momose, Masataka Matsui | 1993-09-07 |
| 5093707 | Semiconductor device with bipolar and CMOS transistors | — | 1992-03-03 |
| 5091760 | Semiconductor device | Hiroshi Momose | 1992-02-25 |
| 5091322 | Semiconductor device and method of manufacturing the same | Hiroshi Momose | 1992-02-25 |
| 5075752 | Bi-CMOS semiconductor device having memory cells formed in isolated wells | Syuso Fujii | 1991-12-24 |
| 5014106 | Semiconductor device for use in a hybrid LSI circuit | Masayoshi Higashizono | 1991-05-07 |
| 4931407 | Method for manufacturing integrated bipolar and MOS transistors | Koji Makita | 1990-06-05 |
| 4900257 | Method of making a polycide gate using a titanium nitride capping layer | — | 1990-02-13 |
| 4769337 | Method of forming selective polysilicon wiring layer to source, drain and emitter regions by implantation through polysilicon layer | — | 1988-09-06 |
| 4663825 | Method of manufacturing semiconductor device | — | 1987-05-12 |