RR

Rabindra K. Roy

NE Nec: 6 patents #7,889 of 14,502Top 55%
CR Council Of Scientific And Industrial Research: 1 patents #1,642 of 4,648Top 40%
GR Georgia Tech Research: 1 patents #1,150 of 2,755Top 45%
Overall (All Time): #660,160 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7225423 Method for automated design of integrated circuits with targeted quality objectives using dynamically generated building blocks Debashis Bhattacharya, Vamsi Boppana, Jayanta Roy 2007-05-29
7003738 Process for automated generation of design-specific complex functional blocks to improve quality of synthesized digital integrated circuits in CMOS using altering process Debashis Bhattacharya, Vamsi Boppana, Rajeev Murgai 2006-02-21
5958077 Method for testing asynchronous circuits Savita Banerjee, Srimat Chakradhar 1999-09-28
5808917 Synthesis of low power linear digital signal processing circuits using activity metrics Abhijit Chatterjee 1998-09-15
5690966 Process for the preparation of an extract from human placenta containing glycosphingolipids and endothelin-like constituent peptides useful for the treatment of vitiligo Ranjan Bhadra, Prajnamoy Pal, Ajit Kumar Dutta 1997-11-25
5513118 High level synthesis for partial scan testing Sujit Dey, Miodrag Potkonjak 1996-04-30
5502730 Partial scan testability utilizing reconvergence through sequential elements Toshinobu Ono 1996-03-26
5493505 Initializable asynchronous circuit design Savita Banerjee, Srimat Chakradhar 1996-02-20