Issued Patents All Time
Showing 26–33 of 33 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6038392 | Implementation of boolean satisfiability with non-chronological backtracking in reconfigurable hardware | Sharad Malik, Margaret Martonosi, Peixin Zhong | 2000-03-14 |
| 6035109 | Method for using complete-1-distinguishability for FSM equivalence checking | Aarti Gupta, Sharad Malik | 2000-03-07 |
| 6026222 | System for combinational equivalence checking | Aarti Gupta | 2000-02-15 |
| 5937183 | Enhanced binary decision diagram-based functional simulation | Sharad Malik | 1999-08-10 |
| 5748486 | Breadth-first manipulation of binary decision diagrams | Chao Cheong | 1998-05-05 |
| 5522063 | Method of finding minimum-cost feedback-vertex sets for a graph for partial scan testing without exhaustive cycle enumeration | Sharad Malik | 1996-05-28 |
| 5457638 | Timing analysis of VLSI circuits | Sharad Malik | 1995-10-10 |
| 5448497 | Exploiting multi-cycle false paths in the performance optimization of sequential circuits | Sujit Dey, Sharad Malik | 1995-09-05 |
