Patrick Variot — 32 Patents | Patent Leaderboard

Patrick Variot has been granted 32 US patents. The first was granted in 1995 and the most recent in November 2025. Patrick Variot ranks #110,428 of 4,157,543 US inventors in our database (top 2.7%). Patent records list Patrick Variot in Los Gatos, CA, US.

Issued Patents All Time

Showing 1–25 of 32 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12476212	3D-interconnect	Chia-Jun Chia, Qwai H. Low	2025-11-18
12394728	Method of forming a region shielding within a package of a microelectronic device	Hong Shen	2025-08-19
12040284	3D-interconnect with electromagnetic interference (“EMI”) shield and/or antenna	Hong Shen	2024-07-16
12021041	Region shielding within a package of a microelectronic device	Hong Shen	2024-06-25
11929337	3D-interconnect	Chok J. Chia, Qwai H. Low	2024-03-12
11031362	3D-interconnect	Chok J. Chia, Qwai H. Low	2021-06-08
10181447	3D-interconnect	Chok J. Chia, Qwai H. Low	2019-01-15
8384205	Electronic device package and method of manufacture	Qwai H. Low	2013-02-26
7993981	Electronic device package and method of manufacture	Qwai H. Low	2011-08-09
6492253	Method for programming a substrate for array-type packages	Chok J. Chia, Seng-Sooi Lim	2002-12-10	$5,405,000
6489571	Molded tape ball grid array package	Chok J. Chia, Qwai H. Low	2002-12-03	$10,963,000
6297550	Bondable anodized aluminum heatspreader for semiconductor packages	Chok J. Chia, Maniam Alagaratnam	2001-10-02	$27,811,000
6143586	Electrostatic protected substrate	Chok J. Chia, Qwai H. Low	2000-11-07	$61,495,000
6117695	Apparatus and method for testing a flip chip integrated circuit package adhesive layer	Adrian Murphy, Manickam Thavarajah	2000-09-12	$14,671,000
6110815	Electroplating fixture for high density substrates	Chok J. Chia, Maniam Alagaratnam	2000-08-29	$21,268,000
6088914	Method for planarizing an array of solder balls	Chok J. Chia, Robert T. Trabucco	2000-07-18	$20,251,000
6054767	Programmable substrate for array-type packages	Chok J. Chia, Seng-Sooi Lim	2000-04-25	$67,747,000
5989937	Method for compensating for bottom warpage of a BGA integrated circuit	Chok J. Chia, Robert T. Trabucco	1999-11-23	$15,861,000
5981311	Process for using a removeable plating bus layer for high density substrates	Chok J. Chia, Seng-Sooi Lim	1999-11-09	$10,372,000
5933710	Method of providing electrical connection between an integrated circuit die and a printed circuit board	Chok J. Chia	1999-08-03	$14,788,000
5869889	Thin power tape ball grid array package	Chok J. Chia, Maniam Alagaratnam	1999-02-09	$4,358,000
5841198	Ball grid array package employing solid core solder balls	Chok J. Chia, Maniam Alagaratnam	1998-11-24	$5,962,000
5789811	Surface mount peripheral leaded and ball grid array package	Chok J. Chia	1998-08-04	$4,833,000
5745986	Method of planarizing an array of plastically deformable contacts on an integrated circuit package to compensate for surface warpage	Chok J. Chia, Robert T. Trabucco	1998-05-05	$14,839,000
5692296	Method for encapsulating an integrated circuit package	—	1997-12-02	$7,759,000

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Patrick Variot — 32 Patents

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