Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12175176 | Fast synthesis of logical circuit design with predictive timing | Peter Moceyunas, Jiong Luo, Luca Gaetano Amaru, Casey The, Patrick Vuillod | 2024-12-24 |
| 10354032 | Optimizing an integrated circuit (IC) design comprising at least one wide-gate or wide-bus | Eyal Odiz, Van E. Morgan, Janet L. Olson | 2019-07-16 |
| 10296690 | Optimizing designs of integrated circuits | Kenneth S. McElvain | 2019-05-21 |
| 9697314 | Identifying and using slices in an integrated circuit (IC) design | Eyal Odiz, Van E. Morgan, Janet L. Olson | 2017-07-04 |
| 9690890 | Creating and using a wide-bus data structure to represent a wide-bus in an integrated circuit (IC) design | Eyal Odiz, Van E. Morgan, Janet L. Olson | 2017-06-27 |
| 9652573 | Creating and using a wide-gate data structure to represent a wide-gate in an integrated circuit (IC) design | Eyal Odiz, Van E. Morgan, Janet L. Olson | 2017-05-16 |
| 9208281 | Optimizing designs of integrated circuits | Kenneth S. McElvain | 2015-12-08 |
| 8689165 | Optimizing designs of integrated circuits | Kenneth S. McElvain | 2014-04-01 |
| 7873930 | Methods and systems for optimizing designs of integrated circuits | Kenneth S. McElvain | 2011-01-18 |