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Fast synthesis of logical circuit design with predictive timing |
Peter Moceyunas, Luca Gaetano Amaru, Casey The, Jovanka Ciric Vujkovic, Patrick Vuillod |
2024-12-24 |
| 11669665 |
Application-specific integrated circuit (ASIC) synthesis based on lookup table (LUT) mapping and optimization |
Luca Gaetano Amaru, Vinicius Neves Possani, Eleonora Testa, Felipe dos Santos Marranghello, Christopher Casares +1 more |
2023-06-06 |
| 11120184 |
Satisfiability sweeping for synthesis |
Luca Gaetano Amaru, Patrick Vuillod |
2021-09-14 |
| 11010511 |
Scalable boolean methods in a modern synthesis flow |
Luca Gaetano Amaru, Eleonora Testa, Patrick Vuillod |
2021-05-18 |
| 10839117 |
Robust exclusive sum-of-product (ESOP) refactoring |
Luca Gaetano Amaru, Patrick Vuillod, Winston J. Haaswijk |
2020-11-17 |
| 10740517 |
Integrated circuit (IC) optimization using Boolean resynthesis |
Luca Gaetano Amaru, Patrick Vuillod |
2020-08-11 |
| 10325051 |
Exact delay synthesis |
Luca Gaetano Amaru, Patrick Vuillod |
2019-06-18 |
| 10049174 |
Exact delay synthesis |
Luca Gaetano Amaru, Patrick Vuillod |
2018-08-14 |