Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6049851 | Method and apparatus for checking cache coherency in a computer architecture | William R. Bryg, Kenneth K. Chan, Eric Delano | 2000-04-11 |
| 5708801 | Apparatus and method for operating chips synchronously at speeds exceeding the bus speed | James B. Williams, Kenneth K. Chan, Ehsan Rashid | 1998-01-13 |
| 5615241 | Programmable rate generator | — | 1997-03-25 |
| 5600824 | Clock generating means for generating bus clock and chip clock synchronously having frequency ratio of N-1/N responsive to synchronization signal for inhibiting data transfer | James B. Williams, Kenneth K. Chan, Ehsan Rashid | 1997-02-04 |
| 5528766 | Multiple arbitration scheme | Michael L. Ziegler, William R. Bryg | 1996-06-18 |
| 5155828 | Computing system with a cache memory and an additional look-aside cache memory | Ross V. La Fetra | 1992-10-13 |
| 5091851 | Fast multiple-word accesses from a multi-way set-associative cache memory | Richard J. Carter | 1992-02-25 |
| 4961013 | Apparatus for generation of scan control signals for initialization and diagnosis of circuitry in a computer | John R. Obermeyer, Donald A. Williamson | 1990-10-02 |
| 4635188 | Means for fast instruction decoding for a computer | Donald A. Williamson | 1987-01-06 |