Issued Patents All Time
Showing 51–75 of 104 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7295473 | System for reducing read disturb for non-volatile storage | Jun Wan, Jeffrey W. Lutze | 2007-11-13 |
| 7289360 | Multi-state memory | Daniel C. Guterman | 2007-10-30 |
| 7280396 | Non-volatile memory and control with improved partial page program capability | Yan Li, Toru Miwa | 2007-10-09 |
| 7280408 | Bitline governed approach for programming non-volatile memory | Daniel C. Guterman, Nima Mokhlesi | 2007-10-09 |
| 7262994 | System for reducing read disturb for non-volatile storage | Jun Wan, Jeffrey W. Lutze | 2007-08-28 |
| 7243275 | Smart verify for multi-state memories | Geoffrey S. Gongwer, Daniel C. Guterman | 2007-07-10 |
| 7230851 | Reducing floating gate to floating gate coupling effect | Daniel C. Guterman | 2007-06-12 |
| 7224613 | Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states | Jian Chen, Tomoharu Tanaka, Khandker N. Quader | 2007-05-29 |
| 7211866 | Scalable self-aligned dual floating gate memory cell array and methods of forming the array | Jack Yuan, Eliyahou Harari, George Samachisa | 2007-05-01 |
| 7187592 | Multi-state memory | Daniel C. Guterman | 2007-03-06 |
| 7170786 | Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND | Henry Chien | 2007-01-30 |
| 7139198 | Efficient verification for coarse/fine programming of non-volatile memory | Daniel C. Guterman, Nima Mokhlesi | 2006-11-21 |
| 7088621 | Bitline governed approach for coarse/fine programming | Daniel C. Guterman, Nima Mokhlesi | 2006-08-08 |
| 7088615 | Multi-state memory | Daniel C. Guterman | 2006-08-08 |
| 7073103 | Smart verify for multi-state memories | Geoffrey S. Gongwer, Daniel C. Guterman | 2006-07-04 |
| 7071060 | EEPROM with split gate source side infection with sidewall spacers | Daniel C. Guterman, Gheorghe Samachisa, Eliyahou Harari | 2006-07-04 |
| 7068539 | Charge packet metering for coarse/fine programming of non-volatile memory | Daniel C. Guterman, Nima Mokhlesi | 2006-06-27 |
| 7061798 | Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states | Jian Chen, Tomoharu Tanaka, Khandker N. Quader | 2006-06-13 |
| 7057939 | Non-volatile memory and control with improved partial page program capability | Yan Li, Toru Miwa | 2006-06-06 |
| 7046548 | Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells | Raul-Adrian Cernea, Khandker N. Quader, Yan Li, Jian Chen | 2006-05-16 |
| 7035146 | Programming non-volatile memory | Gertjan Hemink | 2006-04-25 |
| 7023733 | Boosting to control programming of non-volatile memory | Daniel C. Guterman, Nima Mokhlesi | 2006-04-04 |
| 7020026 | Bitline governed approach for program control of non-volatile memory | Daniel C. Guterman, Nima Mokhlesi | 2006-03-28 |
| 7002843 | Variable current sinking for coarse/fine programming of non-volatile memory | Daniel C. Guterman, Nima Mokhlesi | 2006-02-21 |
| 6954381 | EEPROM with split gate source side injection with sidewall spacers | Daniel C. Guterman, Gheorghe Samachisa, Eliyahou Harari | 2005-10-11 |