Issued Patents All Time
Showing 76–100 of 104 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6953970 | Scalable self-aligned dual floating gate memory cell array and methods of forming the array | Jack Yuan, Eliyahou Harari, George Samachisa | 2005-10-11 |
| 6898121 | Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND | Henry Chien | 2005-05-24 |
| 6894926 | Multi-state memory | Daniel C. Guterman | 2005-05-17 |
| 6894930 | Deep wordline trench to shield cross coupling between adjacent cells for scaled NAND | Henry Chien | 2005-05-17 |
| 6888758 | Programming non-volatile memory | Gertjan Hemink | 2005-05-03 |
| 6870768 | Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells | Raul-Adrian Cernea, Khandker N. Quader, Yan Li, Jian Chen | 2005-03-22 |
| 6862218 | Multi-state memory | Daniel C. Guterman | 2005-03-01 |
| 6861700 | Eeprom with split gate source side injection | Daniel C. Guterman, Gheorghe Samachisa, Eliyahou Harari | 2005-03-01 |
| 6856546 | Multi-state memory | Daniel C. Guterman | 2005-02-15 |
| 6807095 | Multi-state nonvolatile memory capable of reducing effects of coupling between storage elements | Jian Chen, Tomoharu Tanaka, Khandker N. Quader | 2004-10-19 |
| 6781877 | Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells | Raul-Adrian Cernea, Khandker N. Quader, Yan Li, Jian Chen | 2004-08-24 |
| 6762092 | Scalable self-aligned dual floating gate memory cell array and methods of forming the array | Jack Yuan, Eliyahou Harari, George Samachisa | 2004-07-13 |
| 6704222 | Multi-state operation of dual floating gate array | Daniel C. Guterman, Gheorghe Samachisa, Eliyahou Harari | 2004-03-09 |
| 6664587 | EEPROM cell array structure with specific floating gate shape | Daniel C. Guterman, Gheorghe Samachisa, Eliyahou Harari | 2003-12-16 |
| 6522580 | Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states | Jian Chen, Tomoharu Tanaka, Khandker N. Quader | 2003-02-18 |
| 6317364 | Multi-state memory | Daniel C. Guterman | 2001-11-13 |
| 6317363 | Multi-state memory | Daniel C. Guterman | 2001-11-13 |
| 6275419 | Multi-state memory | Daniel C. Guterman | 2001-08-14 |
| 6222762 | Multi-state memory | Daniel C. Guterman | 2001-04-24 |
| 6002152 | EEPROM with split gate source side injection with sidewall spacers | Daniel C. Guterman, Gheorghe Samachisa, Eliyahou Harari | 1999-12-14 |
| 5910915 | EEPROM with split gate source side injection | Daniel C. Guterman, Gheorghe Samachisa, Eliyahou Harari | 1999-06-08 |
| 5910925 | EEPROM with split gate source side injection | Daniel C. Guterman, Gheorghe Samachisa, Eliyahou Harari | 1999-06-08 |
| 5883409 | EEPROM with split gate source side injection | Daniel C. Guterman, Gheorghe Samachisa, Eliyahou Harari | 1999-03-16 |
| 5867429 | High density non-volatile flash memory without adverse effects of electric field coupling between adjacent floating gates | Jian Chen | 1999-02-02 |
| 5847996 | Eeprom with split gate source side injection | Daniel C. Guterman, Gheorghe Samachisa, Eliyahou Harari | 1998-12-08 |