Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8341727 | Method and system for protecting a computer system from denial-of-service attacks and other deleterious resource-draining phenomena related to communications | James Garnett, Christopher Worley, Matthew H. Gerlach | 2012-12-25 |
| 7784063 | Method and apparatus for system caller authentication | John Worley, Daniel Magenheimer, Chris D. Hyser, Robert D. Gardner, Thomas W. Christian +2 more | 2010-08-24 |
| 7509639 | Customized execution environment | — | 2009-03-24 |
| 7509644 | Operating system capable of supporting a customized execution environment | — | 2009-03-24 |
| 7376974 | Apparatus and method for creating a trusted environment | Graeme John Proudler, Boris Balacheff, John Worley, Chris D. Hyser | 2008-05-20 |
| 6161215 | Package routing of integrated circuit signals | David B. Hollenbeck, David Quint, Timothy L. Michalka | 2000-12-12 |
| 5941983 | Out-of-order execution using encoded dependencies between instructions in queues to determine stall values that control issurance of instructions from the queues | Rajiv Gupta | 1999-08-24 |
| 5933850 | Instruction unit having a partitioned cache | Rajendra Kumar, Rajiv Gupta | 1999-08-03 |
| 5778219 | Method and system for propagating exception status in data registers and for detecting exceptions from speculative operations with non-speculative operations | Frederic C. Amerson, Rajiv Gupta, Vinod K. Kathail, B. Ramakrishna Rau, Michael Schlansker | 1998-07-07 |
| 5721865 | Information processing apparatus with prefetch control for prefetching data structure from memory through cache memory | Yooichi Shintani, Yoshikazu Tanaka, Naohiko Irie, B. Ramakrishna Rau, Rajiv Gupta +1 more | 1998-02-24 |
| 5692169 | Method and system for deferring exceptions generated during speculative execution | Vinod K. Kathail, Rajiv Gupta, Bantwal R. Rau, Michael Schlansker, Frederic C. Amerson | 1997-11-25 |
| 5689653 | Vector memory operations | Alan H. Karp, Frederic C. Amerson, Dennis W. Brzezinski, Rajiv Gupta | 1997-11-18 |
| 5615386 | Computer architecture for reducing delays due to branch instructions | Frederic C. Amerson, Rajiv Gupta, Balasubramanian Kumar, Michael Schlansker | 1997-03-25 |
| 5596733 | System for exception recovery using a conditional substitution instruction which inserts a replacement result in the destination of the excepting instruction | Jerome C. Huck, Rajiv Gupta | 1997-01-21 |
| 5282036 | High resolution gamma correction method and apparatus for pixel intensity values in a computer graphics system using minimal memory | Hendrik W. Nelis | 1994-01-25 |
| 4777589 | Direct input/output in a virtual memory system | Steven C. Boettner, William R. Bryg, David V. James, Tso-Kai Liu, Michael J. Mahon +1 more | 1988-10-11 |
| 4713755 | Cache memory consistency control with explicit software instructions | William R. Bryg, Allen J. Baum | 1987-12-15 |
| 4649478 | Operation code selected overflow interrupts | — | 1987-03-10 |
| 4500952 | Mechanism for control of address translation by a program using a plurality of translation tables | Andrew Heller | 1985-02-19 |
| 4430705 | Authorization mechanism for establishing addressability to information in another address space | James Cannavino, Andrew Heller, Morris Taradalsky | 1984-02-07 |
| 4366537 | Authorization mechanism for transfer of program control or data between different address spaces having different storage protect keys | Andrew Heller | 1982-12-28 |