Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5732012 | Rom cell with reduced drain capacitance | Paolo Cappelletti, Bruno Vajana | 1998-03-24 |
| 5677871 | Circuit structure for a memory matrix and corresponding manufacturing method | Federico Pio, Carlo Riva | 1997-10-14 |
| 5597750 | Method of manufacturing a matrix of memory cells having control gates | Federico Pio, Carlo Riva | 1997-01-28 |
| 5486487 | Method for adjusting the threshold of a read-only memory to achieve low capacitance and high breakdown voltage | Giancarlo Ginami, Enrico Laurin, Bruno Vajana | 1996-01-23 |
| 5328863 | Process for manufacturing a ROM cell with low drain capacitance | Paolo Cappelletti, Bruno Vajana | 1994-07-12 |