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Process for manufacturing an integrated circuit comprising an array of memory cells |
Claudio Brambilla, Manlio Sergio Cereda |
2002-03-05 |
| 6104058 |
Method for improving the intermediate dielectric profile, particularly for non-volatile memories |
Claudio Brambilla, Stefano Daffra, Andrea Ravaglia, Manlio Sergio Cereda |
2000-08-15 |
| 5976933 |
Process for manufacturing an integrated circuit comprising an array of memory cells |
Claudio Brambilla, Manlio Sergio Cereda |
1999-11-02 |
| 5894065 |
Method for improving the intermediate dielectric profile, particularly for non-volatile memories |
Claudio Brambilla, Stefano Daffra, Andrea Ravaglia, Manlio Sergio Cereda |
1999-04-13 |
| 5696399 |
Process for manufacturing MOS-type integrated circuits |
Manlio Sergio Cereda |
1997-12-09 |
| 5663080 |
Process for manufacturing MOS-type integrated circuits |
Manlio Sergio Cereda, Enrico Laurin, Andrea Ravaglia |
1997-09-02 |
| 5486487 |
Method for adjusting the threshold of a read-only memory to achieve low capacitance and high breakdown voltage |
Enrico Laurin, Silvia Lucherini, Bruno Vajana |
1996-01-23 |