RL

Robert J. Lipp

CT Crosscheck Technology: 4 patents #2 of 9Top 25%
AA Aztech Associates: 3 patents #2 of 6Top 35%
ZY Zycad: 2 patents #1 of 17Top 6%
AC Actel: 1 patents #114 of 156Top 75%
GA Gatefield: 1 patents #7 of 11Top 65%
Overall (All Time): #207,402 of 4,157,543Top 5%
21
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11044141 High density, high availability compute system Phillip N. Hughes 2021-06-22
10785897 Liquid cooled open compute cold plate Phillip N. Hughes 2020-09-22
10548245 Liquid cooled open compute project rack insert Phillip N. Hughes 2020-01-28
8798287 Vehicle sound simulation system 2014-08-05
8000103 Cooling system for contact cooled electronic modules Phillip P. Hughes 2011-08-16
6751219 Multicast packet duplication at random node or at egress port with frame synchronization Younes Boura 2004-06-15
6751238 Phase re-alignment of SONET/SDH network switch without pointer manipulation Phillip P. Hughes 2004-06-15
6594261 Adaptive fault-tolerant switching network with random initial routing and random routing around faults Younes Boura, Rene L. Cruz 2003-07-15
6252273 Nonvolatile reprogrammable interconnect cell with FN tunneling device for programming and erase Robert M. Salter, III, Kyung Joon Han, Jack Peng 2001-06-26
5773862 Floating gate FGPA cell with separated select device Jack Peng, Robert M. Salter, III 1998-06-30
5764096 General purpose, non-volatile reprogrammable switch Richard D. Freeman, Robert U. Broze, John Caywood, Joseph G. Nolan, III 1998-06-09
5457653 Technique to prevent deprogramming a floating gate transistor used to directly switch a large electrical signal 1995-10-10
5371457 Method and apparatus to test for current in an integrated circuit 1994-12-06
5367210 Output buffer with reduced noise 1994-11-22
5347177 System for interconnecting VLSI circuits with transmission line characteristics 1994-09-13
5309090 Apparatus for heating and controlling temperature in an integrated circuit chip 1994-05-03
5038349 "Method for reducing masking of errors when using a grid-based, ""cross-check"" test structure" 1991-08-06
5037771 Method for implementing grid-based crosscheck test structures and the structures resulting therefrom 1991-08-06
4975640 Method for operating a linear feedback shift register as a serial shift register with a crosscheck grid structure 1990-12-04
4937826 Method and apparatus for sensing defects in integrated circuit elements Tushar R. Gheewala 1990-06-26
4682201 Gate array cell 1987-07-21