Issued Patents All Time
Showing 25 most recent of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10571515 | Frequency guard band validation of processors | Diyanesh Babu Vidyapoornachary Chinnakkonda, Prasanna Jayaraman, Tony E. Sawan | 2020-02-25 |
| 9722335 | Dual in line memory module (DIMM) connector | Ryan J. Pennington, Joab D. Henderson, Divya Kumar | 2017-08-01 |
| 9703563 | Detecting cross-talk on processor links | Anand Haridass, Prasanna Jayaraman | 2017-07-11 |
| 9395782 | Processor noise mitigation using differential crictical path monitoring | Michael Stephen Floyd, Jarom Pena, Ryan J. Pennington, Catherine Sherry | 2016-07-19 |
| 9360021 | Thermal control system based on nonlinear zonal fan operation and optimized fan power | Diyanesh Babu Vidyapoornachary Chinnakkonda, Prasanna Jayaraman, Vijay Anand Mathiyalagan, Tony E. Sawan, Eakambaram Rangaswamy Thirumalai | 2016-06-07 |
| 9341190 | Thermal control system based on nonlinear zonal fan operation and optimized fan power | Diyanesh Babu Vidyapoornachary Chinnakkonda, Prasanna Jayaraman, Vijay Anand Mathiyalagan, Tony E. Sawan, Eakambaram Rangaswamy Thirumalai | 2016-05-17 |
| 9164563 | Processor noise mitigation using differential critical path monitoring | Michael Stephen Floyd, Jarom Pena, Ryan J. Pennington, Catherine Sherry | 2015-10-20 |
| 9117011 | Characterization and functional test in a processor or system utilizing critical path monitor to dynamically manage operational timing margin | Alan J. Drake, Michael Stephen Floyd, Richard L. Willaman | 2015-08-25 |
| 9087135 | Characterization and validation of processor links | Anand Haridass, Prasanna Jayaraman | 2015-07-21 |
| 9020779 | Detecting cross-talk on processor links | Anand Haridass, Prasanna Jayaraman | 2015-04-28 |
| 8855969 | Frequency guard band validation of processors | Diyanesh Babu Vidyapoornachary Chinnakkonda, Prasanna Jayaraman, Tony E. Sawan | 2014-10-07 |
| 8832513 | Characterization and validation of processor links | Anand Haridass, Prasanna Jayaraman | 2014-09-09 |
| 8826092 | Characterization and validation of processor links | Anand Haridass, Prasanna Jayaraman | 2014-09-02 |
| 8347022 | Flash ROM programming | Michael Criscolo, Michael T. Saunders | 2013-01-01 |
| 8230495 | Method for security in electronically fused encryption keys | Jonathan James DeMent, John Liberty | 2012-07-24 |
| 8165847 | Implementing a programmable DMA master with write inconsistency determination | Michael Criscolo, Christopher J. Kuruts, James P. Kuruts, Steven Joseph Smolski | 2012-04-24 |
| 7953510 | System and method for semiconductor identification chip read out | Christopher R. Conley, Christopher J. Kuruts, James P. Kuruts | 2011-05-31 |
| 7793125 | Method and apparatus for power throttling a processor in an information handling system | Charles Ray Johns, Christopher J. Kuruts | 2010-09-07 |
| 7716516 | Method for controlling operation of microprocessor which performs duty cycle correction process | Yosuke Muraki, Tetsuji Tamura, Iwao Takiguchi, Makoto Aikawa, Eskinder Hailu +8 more | 2010-05-11 |
| 7430487 | System and method for implementing a programmable DMA master with data checking utilizing a drone system controller | Michael Criscolo, Christopher J. Kuruts, James P. Kuruts, Steven Joseph Smolski | 2008-09-30 |
| 6976199 | AC LSSD/LBIST test coverage enhancement | Michael T. Saunders | 2005-12-13 |
| 6941504 | Method and apparatus for test case evaluation using a cyclic redundancy checker | Michael Criscolo, Pedro Martin-de-Nicolas, Charles Leverett Meissner, Michael T. Saunders | 2005-09-06 |
| 6006345 | Pattern generator for memory burn-in and test | — | 1999-12-21 |
| 5633877 | Programmable built-in self test method and controller for arrays | Philip G. Shephard, III, William V. Huott, Paul R. Turgeon, Gulsun Yasar, Frederick J. Cox +2 more | 1997-05-27 |
| 5375091 | Method and apparatus for memory dynamic burn-in and test | Bernd Koenemann, William J. Scarpero, Jr., Philip G. Shephard, III, Kenneth D. Wagner, Gulsun Yasar | 1994-12-20 |