Issued Patents All Time
Showing 25 most recent of 48 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12204475 | Using a hardware sequencer in a direct memory access system of a system on a chip | Ahmad Itani, Yen-Te Shih, Jagadeesh Sankaran, Ching-Yu Hung | 2025-01-21 |
| 12118353 | Performing load and permute with a single instruction in a system on a chip | Ching-Yu Hung, Jagadeesh Sankaran, Yen-Te Shih, Ahmad Itani | 2024-10-15 |
| 12099439 | Performing load and store operations of 2D arrays in a single cycle in a system on a chip | Ching-Yu Hung, Jagadeesh Sankaran, Yen-Te Shih, Ahmad Itani | 2024-09-24 |
| 12093539 | Using per memory bank load caches for reducing power use in a system on a chip | Ching-Yu Hung, Jagadeesh Sankaran, Yen-Te Shih, Ahmad Itani | 2024-09-17 |
| 12050548 | Built-in self-test for a programmable vision accelerator of a system on a chip | Ahmad Itani, Yen-Te Shih, Jagadeesh Sankaran, Ching-Yu Hung | 2024-07-30 |
| 11954496 | Reduced memory write requirements in a system on a chip using automatic store predication | Ching-Yu Hung, Jagadeesh Sankaran, Yen-Te Shih, Ahmad Itani | 2024-04-09 |
| 11940947 | Hardware accelerated anomaly detection using a min/max collector in a system on a chip | Ching-Yu Hung, Jagadeesh Sankaran, Yen-Te Shih, Ahmad Itani | 2024-03-26 |
| 11934829 | Using a vector processor to configure a direct memory access system for feature tracking operations in a system on a chip | Ahmad Itani, Yen-Te Shih, Jagadeesh Sankaran, Ching-Yu Hung | 2024-03-19 |
| 11836527 | Accelerating table lookups using a decoupled lookup table accelerator in a system on a chip | Ching-Yu Hung, Jagadeesh Sankaran, Ahmad Itani, Yen-Te Shih | 2023-12-05 |
| 11704067 | Performing multiple point table lookups in a single cycle in a system on chip | Ching-Yu Hung, Jagadeesh Sankaran, Ahmad Itani, Yen-Te Shih | 2023-07-18 |
| 11636063 | Hardware accelerated anomaly detection using a min/max collector in a system on a chip | Ching-Yu Hung, Jagadeesh Sankaran, Yen-Te Shih, Ahmad Itani | 2023-04-25 |
| 11630800 | Programmable vision accelerator | Ching-Yu Hung, Jagadeesh Sankaran, Stanley Tzeng | 2023-04-18 |
| 11593290 | Using a hardware sequencer in a direct memory access system of a system on a chip | Ahmad Itani, Yen-Te Shih, Jagadeesh Sankaran, Ching-Yu Hung | 2023-02-28 |
| 11593001 | Using per memory bank load caches for reducing power use in a system on a chip | Ching-Yu Hung, Jagadeesh Sankaran, Yen-Te Shih, Ahmad Itani | 2023-02-28 |
| 11573921 | Built-in self-test for a programmable vision accelerator of a system on a chip | Ahmad Itani, Yen-Te Shih, Jagadeesh Sankaran, Ching-Yu Hung | 2023-02-07 |
| 11573795 | Using a vector processor to configure a direct memory access system for feature tracking operations in a system on a chip | Ahmad Itani, Yen-Te Shih, Jagadeesh Sankaran, Ching-Yu Hung | 2023-02-07 |
| 7472259 | Multi-cycle instructions | Gregory A. Overkamp, Charles P. Roth | 2008-12-30 |
| 7366876 | Efficient emulation instruction dispatch based on instruction width | Charles P. Roth, Gregory A. Overkamp, Tien Dinh | 2008-04-29 |
| 7360059 | Variable width alignment engine for aligning instructions based on transition between buffers | Thomas Tomazin, William C. Anderson, Charles P. Roth, Kayla Chalmers, Juan Guillermo Revilla | 2008-04-15 |
| 7272705 | Early exception detection | Juan Guillermo Revilla, Charles P. Roth | 2007-09-18 |
| 7266676 | Method and apparatus for branch prediction based on branch targets utilizing tag and data arrays | Thang M. Tran, Deepa Duraiswamy, Srikanth Kannan | 2007-09-04 |
| 7168032 | Data synchronization for a test access port | Charles P. Roth, Ravi Kolagotla, Tien Dinh | 2007-01-23 |
| 7155570 | FIFO write/LIFO read trace buffer with software and hardware loop compression | Charles P. Roth, Gregory A. Overkamp | 2006-12-26 |
| 7134000 | Methods and apparatus for instruction alignment including current instruction pointer logic responsive to instruction length information | Thang M. Tran, Deepa Duraiswamy, Srikanth Kannan | 2006-11-07 |
| 7082516 | Aligning instructions using a variable width alignment engine having an intelligent buffer refill mechanism | Thomas Tomazin, William C. Anderson, Charles P. Roth, Kayla Chalmers, Juan Guillermo Revilla | 2006-07-25 |