Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7472259 | Multi-cycle instructions | Charles P. Roth, Ravi P. Singh | 2008-12-30 |
| 7366876 | Efficient emulation instruction dispatch based on instruction width | Charles P. Roth, Ravi P. Singh, Tien Dinh | 2008-04-29 |
| 7155570 | FIFO write/LIFO read trace buffer with software and hardware loop compression | Ravi P. Singh, Charles P. Roth | 2006-12-26 |
| 7069420 | Decode and dispatch of multi-issue and multiple width instructions | Charles P. Roth, Ravi P. Singh | 2006-06-27 |
| 7065636 | Hardware loops and pipeline system using advanced generation of loop parameters | Ryo Inoue, Ravi P. Singh, Charles P. Roth | 2006-06-20 |
| 7036000 | Valid bit generation and tracking in a pipelined processor | Charles P. Roth, Ravi P. Singh, Thomas Tomazin | 2006-04-25 |
| 7028165 | Processor stalling | Charles P. Roth, Ravi P. Singh | 2006-04-11 |
| 6976151 | Decoding an instruction portion and forwarding part of the portion to a first destination, re-encoding a different part of the portion and forwarding to a second destination | Charles P. Roth, Ravi P. Singh | 2005-12-13 |
| 6920547 | Register adjustment based on adjustment values determined at multiple stages within a pipeline of a processor | Charles P. Roth, Ravi P. Singh | 2005-07-19 |
| 6898693 | Hardware loops | Ravi P. Singh, Charles P. Roth | 2005-05-24 |
| 6889316 | Method and apparatus for restoring registers after cancelling a multi-cycle instruction | Ryo Inoue | 2005-05-03 |
| 6842812 | Event handling | Charles P. Roth, Ravi P. Singh | 2005-01-11 |
| 6829701 | Watchpoint engine for a pipelined processor | Charles P. Roth, Ravi P. Singh | 2004-12-07 |
| 6823448 | Exception handling using an exception pipeline in a pipelined processor | Charles P. Roth, Ravi P. Singh | 2004-11-23 |
| 6789184 | Instruction address generation and tracking in a pipelined processor | Ravi P. Singh, Charles P. Roth | 2004-09-07 |
| 6766444 | Hardware loops | Ravi P. Singh, Charles P. Roth | 2004-07-20 |
| 6754808 | Valid bit generation and tracking in a pipelined processor | Charles P. Roth, Ravi P. Singh, Thomas Tomazin | 2004-06-22 |
| 6748523 | Hardware loops | Ravi P. Singh, Charles P. Roth | 2004-06-08 |
| 6728870 | Register move operations | Charles P. Roth, Ravi P. Singh, Ryo Inoue | 2004-04-27 |
| 6665795 | Resetting a programmable processor | Charles P. Roth, Ravi P. Singh | 2003-12-16 |