| 12204475 |
Using a hardware sequencer in a direct memory access system of a system on a chip |
Yen-Te Shih, Jagadeesh Sankaran, Ravi P. Singh, Ching-Yu Hung |
2025-01-21 |
| 12118353 |
Performing load and permute with a single instruction in a system on a chip |
Ching-Yu Hung, Ravi P. Singh, Jagadeesh Sankaran, Yen-Te Shih |
2024-10-15 |
| 12099439 |
Performing load and store operations of 2D arrays in a single cycle in a system on a chip |
Ching-Yu Hung, Ravi P. Singh, Jagadeesh Sankaran, Yen-Te Shih |
2024-09-24 |
| 12093539 |
Using per memory bank load caches for reducing power use in a system on a chip |
Ching-Yu Hung, Ravi P. Singh, Jagadeesh Sankaran, Yen-Te Shih |
2024-09-17 |
| 12050548 |
Built-in self-test for a programmable vision accelerator of a system on a chip |
Yen-Te Shih, Jagadeesh Sankaran, Ravi P. Singh, Ching-Yu Hung |
2024-07-30 |
| 11954496 |
Reduced memory write requirements in a system on a chip using automatic store predication |
Ching-Yu Hung, Ravi P. Singh, Jagadeesh Sankaran, Yen-Te Shih |
2024-04-09 |
| 11940947 |
Hardware accelerated anomaly detection using a min/max collector in a system on a chip |
Ching-Yu Hung, Ravi P. Singh, Jagadeesh Sankaran, Yen-Te Shih |
2024-03-26 |
| 11934829 |
Using a vector processor to configure a direct memory access system for feature tracking operations in a system on a chip |
Yen-Te Shih, Jagadeesh Sankaran, Ravi P. Singh, Ching-Yu Hung |
2024-03-19 |
| 11836527 |
Accelerating table lookups using a decoupled lookup table accelerator in a system on a chip |
Ravi P. Singh, Ching-Yu Hung, Jagadeesh Sankaran, Yen-Te Shih |
2023-12-05 |
| 11704067 |
Performing multiple point table lookups in a single cycle in a system on chip |
Ching-Yu Hung, Ravi P. Singh, Jagadeesh Sankaran, Yen-Te Shih |
2023-07-18 |
| 11636063 |
Hardware accelerated anomaly detection using a min/max collector in a system on a chip |
Ching-Yu Hung, Ravi P. Singh, Jagadeesh Sankaran, Yen-Te Shih |
2023-04-25 |
| 11593290 |
Using a hardware sequencer in a direct memory access system of a system on a chip |
Yen-Te Shih, Jagadeesh Sankaran, Ravi P. Singh, Ching-Yu Hung |
2023-02-28 |
| 11593001 |
Using per memory bank load caches for reducing power use in a system on a chip |
Ching-Yu Hung, Ravi P. Singh, Jagadeesh Sankaran, Yen-Te Shih |
2023-02-28 |
| 11573921 |
Built-in self-test for a programmable vision accelerator of a system on a chip |
Yen-Te Shih, Jagadeesh Sankaran, Ravi P. Singh, Ching-Yu Hung |
2023-02-07 |
| 11573795 |
Using a vector processor to configure a direct memory access system for feature tracking operations in a system on a chip |
Yen-Te Shih, Jagadeesh Sankaran, Ravi P. Singh, Ching-Yu Hung |
2023-02-07 |