Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9298799 | Method and apparatus for utilizing patterns in data to reduce file size | Bruce B. Pedersen, Jim Park | 2016-03-29 |
| 8356019 | Method and apparatus for utilizing patterns in data to reduce file size | Bruce B. Pedersen, Jim Park | 2013-01-15 |
| 7839167 | Interconnection and input/output resources for programmable logic integrated circuit devices | Tony Ngai, Bruce B. Pedersen, Sergey Shumarayev, James Schleicher, Wei-Jen Huang +6 more | 2010-11-23 |
| 7492188 | Interconnection and input/output resources for programmable logic integrated circuit devices | Tony Ngai, Bruce B. Pedersen, Sergey Shumarayev, James Schleicher, Wei-Jen Huang +6 more | 2009-02-17 |
| 7302669 | Method and software for generating enable and data input signals for flip-flops used for implementing logic functions on programmable logic devices | — | 2007-11-27 |
| 7126858 | Apparatus for emulating asynchronous clear in memory structure and method for implementing the same | Jinyong Yuan | 2006-10-24 |
| 6989689 | Interconnection and input/output resources for programmable logic integrated circuit devices | Tony Ngai, Bruce B. Pedersen, Sergey Shumarayev, James Schleicher, Wei-Jen Huang +6 more | 2006-01-24 |
| 6894533 | Interconnection and input/output resources for programmable logic integrated circuit devices | Tony Ngai, Bruce B. Pedersen, Sergey Shumarayev, James Schleicher, Wei-Jen Huang +6 more | 2005-05-17 |
| 6407576 | Interconnection and input/output resources for programmable logic integrated circuit devices | Tony Ngai, Bruce B. Pedersen, Sergey Shumarayev, James Schleicher, Wei-Jen Huang +6 more | 2002-06-18 |
| 5838584 | Optimizing chain placement in a programmable logic device | — | 1998-11-17 |
| 5670895 | Routing connections for programmable logic array integrated circuits | Bruce B. Pedersen, Francis B. Heile, David W. Mendel | 1997-09-23 |