Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11429769 | Implementing a hardware description language memory using heterogeneous memory primitives | Pradip Kar, Chaithanya Dudha, Satyaprakash Pareek | 2022-08-30 |
| 11416659 | Implementing an asymmetric memory with random port ratios using dedicated memory primitives | Pradip Kar, Bing Tian | 2022-08-16 |
| 11188697 | On-chip memory access pattern detection for power and resource reduction | Chaithanya Dudha, Rajeev Patwari, Ashish Sirasao, Krishna Garlapati | 2021-11-30 |
| 11100267 | Multi dimensional memory compression using bytewide write enable | Pradip Kar, Chaithanya Dudha | 2021-08-24 |
| 10366001 | Partitioning memory blocks for reducing dynamic power consumption | Chaithanya Dudha, Krishna Garlapati, Chun Zhang, Fan Zhang, Anup Kumar Sultania | 2019-07-30 |
| 10289786 | Circuit design transformation for automatic latency reduction | Chaithanya Dudha, Shangzhi Sun, Ashish Sirasao | 2019-05-14 |